Patentable/Patents/US-10032714
US-10032714

Semiconductor switch

PublishedJuly 24, 2018
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

A semiconductor switch includes an insulating film on a semiconductor substrate. A switching circuit is on a first portion of the insulating film. The switching circuit is configured to switch a path of a high-frequency signal. A wiring layer is provided on the insulating film. The wiring layering includes a signal wire and a ground wire. A conductive layer is between the wiring layer and the insulating film. The conductive layer, in some embodiments, includes a first conductive region between the high-frequency wiring and the insulating film and a second conductive region between the grounding wiring and the insulating film.

Patent Claims
19 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A semiconductor switch, comprising: a semiconductor substrate; an insulating film on the semiconductor substrate; a conductive layer on the insulating film; a wiring layer comprising a first wire and a second wire above the conductive layer, the first wire carrying a high-frequency signal and the second wire connected to ground; and a switching circuit on a first portion of the insulating film, the switching circuit configured to switch a path of the high-frequency signal, wherein a width of a first conductive region of the conductive layer is greater than a width of the first wire, the first conductive region being between a second portion of the insulating layer and the first wire, the second portion being adjacent to the first portion in a first direction; and a width of a second conductive region of the conductive layer is greater than a width of the second wire, the second conductive region being between the second portion of the insulating layer and the second wire.

2

2. The semiconductor switch according to claim 1 , wherein the insulating film comprises a buried oxide layer, a shallow trench isolation layer, and an interlayer dielectric layer.

3

3. The semiconductor switch according to claim 2 , wherein the first portion of the insulating film includes only the buried oxide layer.

4

4. The semiconductor switch according to claim 1 , wherein the conductive layer is connectable to a power supply potential such that an electrical potential of the conductive layer is higher than an electrical potential of the semiconductor substrate.

5

5. The semiconductor switch according to claim 2 , wherein the interlayer dielectric layer covers the conductive layer, and a first via in the interlayer dielectric layer contacts the conductive layer such that the conductive layer is connectable to a power supply potential through the first via.

6

6. The semiconductor switch according to claim 1 , further comprising: a second via in a second portion of the insulating film adjacent to the first portion in the first direction, the second via contacting the semiconductor substrate, wherein a specific resistance of the second via is higher than a specific resistance of the semiconductor substrate.

7

7. The semiconductor switch according to claim 6 , wherein a plurality of second vias are regularly arranged in the second portion of the insulating film along a first direction and along a second direction diagonal with respect to the first direction.

8

8. The semiconductor switch according to claim 1 , further comprising: a charge trapping layer between the semiconductor substrate and the insulating film.

9

9. The semiconductor switch according to claim 1 , wherein the conductive layer is a metal layer or a metal silicide layer.

10

10. The semiconductor switch according to claim 1 , wherein the conductive layer includes a first conductive layer and a second conductive layer between the first conductive layer and the wiring layer, the first and second conductive layers being separated from each other by an insulating material.

11

11. The semiconductor switch according to claim 1 , wherein a third conductive region of the conductive layer is between the first and second conductive regions in a direction parallel to a surface of the semiconductor substrate.

12

12. A semiconductor switch, comprising: a semiconductor substrate having a first region and a second region in a same plane, the first region being adjacent to the second region; an insulating film formed on the semiconductor substrate in the first and second regions; a switch circuit formed over the insulating film on the first region; an interlayer dielectric layer formed over the insulating film on the second region and the switch circuit on the first region; and a first wiring on the interlayer dielectric layer on the second region, the first wiring including a signal wire and a ground wire; a first conductive region formed in the interlayer dielectric layer between the signal wire and the insulating film on the second region; and a second conductive region formed in the interlayer dielectric layer between the ground wire and the insulating film on the second region.

13

13. The semiconductor switch according to claim 12 , wherein the first conductive region and the second conductive region each include a plurality of conductive layers embedded in the interlayer dielectric layer, and each conductive layer is in a separate plane within a thickness of the interlayer dielectric.

14

14. The semiconductor switch according to claim 12 , further comprising: a semiconductor layer between the semiconductor substrate and the insulating film, the semiconductor layer having at least one of a higher crystal defect density than the semiconductor substrate, a different impurity concentration than the semiconductor substrate, and a different conductivity type than the semiconductor substrate.

15

15. The semiconductor switch according to 14 , wherein the semiconductor layer is a charge trapping layer deposited on the semiconductor substrate.

16

16. The semiconductor switch according to claim 12 , further comprising: a shallow trench isolation layer over the insulating film on the second region, wherein the shallow trench isolation layer includes a plurality of dummy SOI layers regularly arranged within the shallow trench isolation layer, the dummy SOI layers each including a semiconductor portion contacting the insulating film and a conductive silicide portion between the semiconductor portion and the first wiring.

17

17. The semiconductor switch according to claim 12 , further comprising: a pad disposed on the interlayer dielectric film over the second region, the pad being adjacent to, but spaced apart from, the first wiring; and a via extending through the interlayer dielectric film and electrically connecting the pad to first conductive region, wherein the pad is connectable to a power supply potential to permit the first conductive region to be biased at a positive potential with respect to the semiconductor substrate.

18

18. The semiconductor switch according to claim 12 , further comprising: a plurality of conductive columnar bodies extending through the insulating film and contacting the semiconductor substrate.

19

19. An RF switching circuit, comprising: a switch between first RF terminal and a high-frequency signal line that is connected to an antenna terminal, the switch element disposed on a first region of a substrate, the high-frequency signal line disposed on a second region of the substrate adjacent to the first region, the switch including a first transistor connected between the first RF terminal and the high-frequency signal line and a second transistor connected between the RF terminal and a ground line disposed on a third region of the substrate connected to second region, wherein the substrate comprises a semiconductor portion and an insulating portion on the semiconductor portion, in the first region, a semiconductor layer is disposed on an upper surface of the insulating portion, and portions of the first and second transistors are formed in the semiconductor layer, in the second and third regions, a first insulating layer is disposed on the upper surface of the insulating portion, and a second insulating layer is disposed on the first insulating layer, in the second region, the second insulating layer is between the high-frequency signal line and the first insulating layer, a first conductive region is between the high-frequency signal line and the upper surface of the insulating portion, and at least a first portion of the second insulating layer is between the first conductive region and the high-frequency signal line, and in the third region, the second insulating layer is between the ground line and the first insulating layer, a second conductive region is between the ground line and the upper surface of the insulating portion, and at least a second portion of the second insulating layer is between the second conductive region and the ground line.

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Patent Metadata

Filing Date

March 3, 2016

Publication Date

July 24, 2018

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Cite as: Patentable. “Semiconductor switch” (US-10032714). https://patentable.app/patents/US-10032714

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