Switching power supply device having pulse-by-pulse type overcurrent protection function

1. A switching power supply device, comprising: a switching output circuit configured to generate an output voltage from an input voltage; an oscillation circuit configured to generate a clock signal; a control circuit configured to control driving of the switching output circuit in synchronization with the clock signal; a pulse-by-pulse type overcurrent protection circuit configured to detect an overcurrent flowing through the switching output circuit to generate an overcurrent protection signal for forcibly stopping a switching operation of the switching output circuit; and a pulse skip circuit configured to perform a pulse skip operation of the clock signal in response to the overcurrent protection signal, wherein the pulse skip circuit comprises: a frequency dividing part configured to start a frequency dividing operation of the clock signal in response to the overcurrent protection signal to generate a mask period expiration signal; an RS flipflop configured to generate a mask signal set to a first logic level in response to the overcurrent protection signal and reset to a second logic level in response to the mask period expiration signal; and a logic gate configured to block the clock signal over a mask period during which the mask signal is set to the first logic level.

2. The device of claim 1 , wherein the frequency dividing part comprises: a first D flipflop configured to generate a first frequency division clock signal having a logic level alternately changed at every rising edge of the clock signal generated by the oscillation circuit; a second D flipflop configured to generate a second frequency division clock signal having a logic level alternately changed at every rising edge of the first frequency division clock signal; and a third D flipflop configured to generate a third frequency division clock signal having a logic level alternately changed at every rising edge of the second frequency division clock signal and invert the third frequency division clock signal to generate the mask period expiration signal.

3. The device of claim 2 , wherein the first, second and third frequency division clock signals are reset to a high level in response to a rising edge of the overcurrent protection signal.

4. The device of claim 1 , wherein the frequency dividing part comprises one or more stages of D flipflops and a length of the mask period is in proportion to the number of stages of D flipflops.

5. An electronic device comprising the switching power supply device of claim 1 .

6. A switching power supply device, comprising: a switching output circuit configured to generate an output voltage from an input voltage; an oscillation circuit configured to generate a clock signal; a control circuit configured to control driving of the switching output circuit in synchronization with the clock signal; a pulse-by-pulse type overcurrent protection circuit configured to detect an overcurrent flowing through the switching output circuit to generate an overcurrent protection signal for forcibly stopping a switching operation of the switching output circuit; and a pulse skip circuit configured to perform a pulse skip operation of the clock signal in response to the overcurrent protection signal, wherein the pulse skip circuit comprises: a timer part configured to start a counting operation in response to the clock signal to generate a mask period expiration signal; an RS flipflop configured to generate a first mask signal set to a first logic level in response to the overcurrent protection signal and reset to a second logic level in response to the mask period expiration signal; a D flipflop configured to latch the first mask signal in response to the overcurrent protection signal to generate a second mask signal; and a logic gate configured to block the clock signal over a mask period during which the second mask signal is set to the first logic level.

7. The device of claim 6 , wherein the second mask signal is reset to the second logic level in response to the mask period expiration signal.

8. The device of claim 6 , wherein the timer part is configured to extend the mask period as the output voltage is lowered.

9. The device of claim 6 , wherein the timer part comprises: a current source configured to generate a charge current; a capacitor charged by the charge current; a charge/discharge switch configured to conduct and block current between both ends of the capacitor in response to the first mask signal; a voltage source configured to generate a threshold voltage; and a comparator configured to compare a charge voltage of the capacitor with the threshold voltage to generate an expiration timing signal.

10. The device of claim 9 , wherein the current source is configured to decrease the charge current as the output voltage is lowered.

11. The device of claim 10 , wherein the voltage source is configured to increase the threshold voltage as the output voltage is lowered.

12. The device of claim 9 , wherein the voltage source is configured to increase the threshold voltage as the output voltage is lowered.

13. An electronic device comprising the switching power supply device of claim 6 .