A semiconductor structure and a manufacturing method thereof are provided. The semiconductor structure includes an isolation layer, a gate dielectric layer, a tantalum nitride layer, a tantalum oxynitride layer, an n type work function metal layer and a filling metal. The isolation layer is formed on a substrate, and the isolation layer has a first gate trench. The gate dielectric layer is formed in the first gate trench, the tantalum nitride layer is formed on the gate dielectric layer, and the tantalum oxynitride layer is formed on the tantalum nitride layer. The n type work function metal layer is formed on the tantalum oxynitride layer in the first gate trench, and the filling metal is formed on the n type work function metal layer in the first gate trench.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A manufacturing method of a semiconductor structure, comprising: forming a bottom barrier layer on a dielectric layer; forming a tantalum nitride layer on the bottom barrier layer; performing a dry oxidation process on the tantalum nitride layer for forming a tantalum oxynitride layer on the tantalum nitride layer, wherein the tantalum oxynitride layer has a gradient oxygen concentration decreased from a top surface of the tantalum oxynitride layer toward the tantalum nitride layer; forming a work function metal layer on the tantalum oxynitride layer, the work function metal layer comprising at least one of TiN, TaN and TiAlN; and removing the work function metal layer by a wet etching process.
2. The manufacturing method of the semiconductor structure according to claim 1 , wherein performing the dry oxidation process comprises at least one of exposing the tantalum nitride layer to air at room temperature, performing a plasma process on the tantalum nitride layer, and annealing the tantalum nitride layer at a temperature of less than 200° C.
3. The manufacturing method of the semiconductor structure according to claim 1 , wherein performing the dry oxidation process comprises providing an oxygen source, a nitrogen source and a tantalum source simultaneously for forming the tantalum oxynitride layer.
4. The manufacturing method of the semiconductor structure according to claim 1 , wherein the dry oxidation process is performed on a surface of the tantalum nitride layer.
5. The manufacturing method of the semiconductor structure according to claim 1 , wherein the wet etching process comprises applying a mixed solution of hydrochloric acid and aqueous hydrogen peroxide on the work function metal layer.
6. The manufacturing method of the semiconductor structure according to claim 1 , further comprising: forming an additional tantalum nitride layer on the tantalum oxynitride layer.
7. The manufacturing method of the semiconductor structure according to claim 6 , further comprising: removing the additional tantalum nitride layer by the wet etching process for removing the work function metal layer.
8. A manufacturing method of a semiconductor structure, comprising: forming an isolation layer on a substrate, the isolation layer having a first gate trench; forming a gate dielectric layer in the first gate trench; forming a bottom barrier layer on the gate dielectric layer; forming a tantalum nitride layer on the bottom barrier layer; performing a dry oxidation process on the tantalum nitride layer for forming a tantalum oxynitride layer on the tantalum nitride layer, wherein the tantalum oxynitride layer has a gradient oxygen concentration decreased from a top surface of the tantalum oxynitride layer toward the tantalum nitride layer; forming a p type work function metal layer on the tantalum oxynitride layer, the p type work function metal layer comprising at least one of TiN, TaN and TiAlN; and removing the p type work function metal layer by a wet etching process.
9. The manufacturing method of the semiconductor structure according to claim 8 , wherein performing the dry oxidation process comprises exposing the tantalum nitride layer to air at room temperature.
10. The manufacturing method of the semiconductor structure according to claim 8 , wherein performing the dry oxidation process comprises performing a plasma process on the tantalum nitride layer.
11. The manufacturing method of the semiconductor structure according to claim 8 , wherein performing the dry oxidation process comprises annealing the tantalum nitride layer at a temperature of less than 200° C.
12. The manufacturing method of the semiconductor structure according to claim 8 , wherein performing the dry oxidation process comprises providing an oxygen source, a nitrogen source and a tantalum source simultaneously for forming the tantalum oxynitride layer.
13. The manufacturing method of the semiconductor structure according to claim 8 , wherein the dry oxidation process is performed on a surface of the tantalum nitride layer.
14. The manufacturing method of the semiconductor structure according to claim 8 , wherein the wet etching process comprises applying a mixed solution of hydrochloric acid and aqueous hydrogen peroxide on the p type work function metal layer.
15. The manufacturing method of the semiconductor structure according to claim 8 , further comprising: forming an additional tantalum nitride layer on the tantalum oxynitride layer.
16. The manufacturing method of the semiconductor structure according to claim 15 , further comprising: removing the additional tantalum nitride layer by the wet etching process for removing the p type work function metal layer.
17. The manufacturing method of the semiconductor structure according to claim 8 , further comprising: forming an n type work function metal layer on the tantalum oxynitride layer after the p type work function metal is removed; and forming a filling metal on the n type work function metal layer in the first gate trench.
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March 8, 2017
September 11, 2018
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