Patentable/Patents/US-10128147
US-10128147

Interconnect structure

PublishedNovember 13, 2018
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

Semiconductor structures include a patterned interlayer dielectric overlaying a semiconductor substrate. The interlayer dielectric includes a first dielectric layer and at least one additional dielectric layer disposed on the first dielectric layer, wherein the patterned interlayer dielectric comprises at least one opening extending through the interlayer dielectric to the semiconductor substrate. Chemically enriched regions including ions of Si, P, B, N, O and combinations thereof are disposed in surfaces of the first dielectric layer and the at least one dielectric layer defined by the at least one opening. Also described are methods of for forming an interconnect structure in a semiconductor structure.

Patent Claims
17 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A method for forming an interconnect structure in a semiconductor structure, comprising: forming at least one opening extending through an interlayer dielectric, wherein the interlayer dielectric comprises a first dielectric layer and at least one additional dielectric layer disposed on the first dielectric layer, wherein the first dielectric layer is formed of a different material than the at least one additional dielectric layer; and treating surfaces defining the at least one opening to form a chemically enriched dielectric region in the surfaces, wherein the chemically enriched dielectric region comprises ions comprising Si, P, N, B, O or combinations including two or more of the ions, and wherein a percentage of the ions in the chemically enriched dielectric region of first dielectric layer is different from a percentage of the ions in the chemically enriched dielectric region of the at least one additional dielectric layer.

2

2. The method of claim 1 , wherein the chemically enriched dielectric region comprises nitrogen ions and the percentage of nitrogen ions in the first dielectric layer is greater than the percentage of nitrogen ions in the at least one additional dielectric layer.

3

3. The method of claim 1 , wherein the chemically enriched dielectric region comprises nitrogen ions and the percentage of nitrogen ions in the first dielectric layer is less than the percentage of nitrogen ions in the at least one additional dielectric layer.

4

4. The method of claim 1 , wherein the chemically enriched dielectric region comprises nitrogen ions, wherein the first dielectric layer has the percentage of nitrogen greater than 0.5 percent to 1.5 percent and the at least one additional material dielectric layer has the percentage of nitrogen greater than 2 percent.

5

5. The method of claim 4 , wherein the first dielectric comprises silicon dioxide or tetraorthosilicate, and the second dielectric layer comprises a silsesquioxane or a carbon doped oxide including atoms of Si, C, O and H.

6

6. The method of claim 1 , further comprising cleaning a bottom surface of the at least one opening.

7

7. The method of claim 6 , further comprising conformally depositing a metal liner layer comprising tantalum in the at least one opening subsequent to the cleaning; filling the at least one opening with a conductive metal; and chemically mechanically polishing to a top surface of the interlayer.

8

8. The method of claim 1 , wherein treating the surfaces defining the at least one opening to form the chemically enriched region in the interlayer dielectric comprises exposing a process gas to plasma to generate the ions.

9

9. A pre-liner dielectric modification treatment method for forming an interconnect structure in a semiconductor structure, comprising: depositing two or more dielectric layers to define an interlayer dielectric, wherein at least two of the dielectric layers are formed of different dielectric materials; patterning the interlayer dielectric to form at least one opening exposing surfaces of the different dielectric materials; exposing the surfaces of the different dielectric materials to ions comprising Si, P, N, B, O or combinations including two or more of the ions, wherein percentages of the ions that penetrate into the different dielectric materials are different.

10

10. The method of claim 9 , wherein the at least two of the dielectric layers formed of different dielectric materials comprise a first dielectric layer overlaying a second dielectric layer, and wherein the ions comprise nitrogen ions and the percentage of nitrogen ions in the first dielectric layer is greater than the percentage of nitrogen ions in the at least one additional dielectric layer.

11

11. The method of claim 10 , wherein the first dielectric comprises silicon dioxide or tetraorthosilicate, and the second dielectric layer comprises a silsesquioxane or a carbon doped oxide including atoms of Si, C, O and H.

12

12. The method of claim 9 , wherein the at least two of the dielectric layers formed of different dielectric materials comprise a first dielectric layer overlaying a second dielectric layer, and wherein the ions comprise nitrogen ions and the percentage of nitrogen ions in the first dielectric layer is less than the percentage of nitrogen ions in the at least one additional dielectric layer.

13

13. The method of claim 12 , wherein the first dielectric comprises silicon dioxide or tetraorthosilicate, and the second dielectric layer comprises a silsesquioxane or a carbon doped oxide including atoms of Si, C, O and H.

14

14. The method of claim 9 , wherein the at least two of the dielectric layers formed of different dielectric materials comprise a first dielectric layer overlaying a second dielectric layer, wherein the ions comprise nitrogen ions, and wherein the first dielectric layer has the percentage of nitrogen greater than 0.5 percent to 1.5 percent and the at least one additional material dielectric layer has the percentage of nitrogen greater than 2 percent.

15

15. The method of claim 9 , further comprising cleaning a bottom surface of the at least one opening.

16

16. The method of claim 15 , further comprising conformally depositing a metal liner layer comprising tantalum in the at least one opening subsequent to the cleaning; filling the at least one opening with a conductive metal; and chemically mechanically polishing to a top surface of the interlayer.

17

17. The method of claim 9 , wherein exposing the surfaces of the different dielectric materials to the ions comprises exposing a process gas to plasma to generate the ions.

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Patent Metadata

Filing Date

January 24, 2018

Publication Date

November 13, 2018

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