A method for manufacturing a surface-mount type package whose face parallel with the semiconductor chip surface has a circular cross-section, is characterized by including at least the following steps in this order: a first step in which a semiconductor chip is bonded onto a circular support substrate; a second step in which the semiconductor chip is sealed with resin; a third step in which the resin covering the pads of the semiconductor chip is removed; a fourth step in which a rewiring layer is formed; and a fifth step in which bumps are formed. The method can provide a surface-mount type package for semiconductor chips which is resistant to failures caused by thermal stress.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A method for manufacturing a surface-mount type package whose face parallel with a semiconductor chip surface has a circular cross-section, characterized by comprising at least following steps in this order: a first step in which a semiconductor chip is bonded onto a circular support substrate; a second step in which the semiconductor chip is sealed with resin; a third step in which the resin covering pads of the semiconductor chip is removed; a fourth step in which a rewiring layer is formed; and a fifth step in which bumps are formed, wherein the package is a CSP (chip-size package), the semiconductor chip is circular with a diameter of 0.5 inches, and the resin for sealing the semiconductor chip has a thickness of 0.05 mm or more and 3.0 mm or less in a diametrical direction of the semiconductor chip.
2. A method for manufacturing a surface-mount type package according to claim 1 , characterized in that the support substrate is not sealed with resin in the second step.
3. A method for manufacturing a surface-mount type package according to claim 1 , characterized in that multiple semiconductor chips are sealed on one surface-mount type package.
4. A method for manufacturing a surface-mount type package according to claim 1 , characterized in that the bumps are placed with equal spacing in a manner forming a circle on a bottom face of the surface-mount type package.
5. A method for manufacturing a surface-mount type package according to claim 1 , characterized in that the pads are placed with equal spacing in a manner forming a circle.
6. A method for manufacturing a surface-mount type package according to claim 1 , characterized in that wiring patterns in the rewiring layer are formed by curved lines, straight lines, or both.
7. The method according to claim 1 , wherein the resin for sealing the semiconductor chip has a thickness of 0.05 mm or more and 0.5 mm or less in a diametrical direction of the semiconductor chip.
8. A surface-mount type package characterized in that bumps, a rewiring layer, a semiconductor chip, and a support substrate are stacked together in this order in a thickness direction; wherein: at least a side face of the semiconductor chip is covered with a sealing resin part; and a face parallel with a semiconductor chip surface has a circular cross-section, the package is a CSP (chip-size package), the semiconductor chip is circular with a diameter of 0.5 inches, and the resin part for sealing the semiconductor chip has a thickness of 0.05 mm or more and 3.0 mm or less in a diametrical direction of the semiconductor chip.
9. A surface-mount type package according to claim 8 , characterized in that the support substrate is exposed on a surface thereof.
10. A surface-mount type package according to claim 8 , characterized in that multiple semiconductor chips are sealed.
11. A surface-mount type package according to claim 8 , characterized in that the bumps are placed with equal spacing in a manner forming a circle on a bottom face of the surface-mount type package.
12. A surface-mount type package according to claim 8 , characterized in that pads of the semiconductor chip are placed with equal spacing in a manner forming a circle.
13. A surface-mount type package according to claim 8 , characterized in that wiring patterns in the rewiring layer are formed by curved lines, straight lines, or both.
14. The surface-mount type package according to claim 8 , wherein the resin for sealing the semiconductor chip has a thickness of 0.05 mm or more and 0.5 mm or less in a diametrical direction of the semiconductor chip.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
November 24, 2015
December 25, 2018
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