Patentable/Patents/US-10324719
US-10324719

Detection of potential need to use a larger data format in performing floating point operations

PublishedJune 18, 2019
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

Detection of whether a result of a floating point operation is safe. Characteristics of the result are examined to determine whether the result is safe or potentially unsafe, as defined by the user. An instruction is provided to facilitate detection of safe or potentially unsafe results.

Patent Claims
20 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A computer program product for determining whether a decimal floating point number is safe or unsafe, said computer program product comprising: a non-transitory computer readable storage medium readable by a processing circuit and storing instructions for performing a method comprising: obtaining, by a processor of a processing environment, a machine instruction for execution, the machine instruction comprising an opcode and a register field; obtaining, by the processor, a first operand in a decimal floating point format, the first operand included in a register specified by the register field; and performing, by the processor, a function defined by the opcode of the machine instruction of determining whether the first operand is a safe decimal floating point number or is a potentially unsafe decimal floating point number, said function comprising: determining, by the processor, a data group and a sign for the first operand; determining, by the processor, a plurality of second operand bits using one or more other fields of the machine instruction, each bit of the plurality of second operand bits corresponding to a data group and sign combination; selecting, by the processor, a bit of the plurality of second operand bits based on the data group and sign determined for the first operand; determining, by the processor, a value of the selected bit; and setting, by the processor, a condition code based on the value of the selected bit, the condition code indicating whether a result of a floating point operation is safe or potentially unsafe, wherein unsafe indicates that use of a larger data format would produce a different value or quantum.

2

2. The computer program product of claim 1 , wherein the register specified by the register field comprises a floating point register.

3

3. The computer program product of claim 1 , wherein the one or more other fields include an index field, a base field and a displacement value.

4

4. The computer program product of claim 3 , wherein contents of a register specified by the index field, contents of a register specified by the base field, and the displacement value are added together to produce a result comprising 64 bits, and wherein bits 0 - 51 are ignored, the plurality of second operand bits comprise bits 52 - 63 , and wherein each bit of bits 52 - 63 corresponds to a particular data group and sign combination.

5

5. The computer program product of claim 4 , wherein: bit 52 corresponds to a data group having the characteristics of finite number, zero significand, and nonextreme exponent, and to a sign of positive; bit 53 corresponds to a data group having the characteristics of finite number, zero significand, and nonextreme exponent, and to a sign of negative; bit 54 corresponds to a data group having the characteristics of finite number, zero significand, and extreme exponent, and to a sign of positive; bit 55 corresponds to a data group having the characteristics of finite number, zero significand, and extreme exponent, and to a sign of negative; bit 56 corresponds to a data group having the characteristics of finite number, nonzero significand, and extreme exponent, and to a sign of positive; bit 57 corresponds to a data group having the characteristics of finite number, nonzero significand, and extreme exponent, and to a sign of negative; bit 58 corresponds to a data group having the characteristics of finite number, nonzero significand, nonextreme exponent, and zero leftmost digit in the significand, and to a sign of positive; bit 59 corresponds to a data group having the characteristics of finite number, nonzero significand, nonextreme exponent, and zero leftmost digit in the significand, and to a sign of negative; bit 60 corresponds to a data group having the characteristics of finite number, nonzero significand, nonextreme exponent and nonzero leftmost digit in the significand, and to a sign of positive; bit 61 corresponds to a data group having the characteristics of finite number, nonzero significand, nonextreme exponent and nonzero leftmost digit in the significand, and to a sign of negative; bit 62 corresponds to a data group having the characteristics of infinity or not a number, and to a sign of positive; and bit 63 corresponds to a data group having the characteristics of infinity or not a number, and to a sign of negative.

6

6. The computer program product of claim 3 , wherein the machine instruction comprises 48 bits, and wherein the opcode comprises bit 0 - 7 and 40 - 47 , the register field comprises bits 8 - 11 , the index field comprises bits 12 - 15 , the base field comprises bits 16 - 19 , and the displacement field comprises bits 20 - 31 .

7

7. The computer program product of claim 1 , wherein the condition code indicates whether characteristics of a value specified in the first operand match one or more selected conditions, and wherein a match indicates the value is safe or potentially unsafe depending on the selected conditions.

8

8. The computer program product of claim 1 , wherein the computer architecture is the IBM® z/Architecture, and wherein the machine instruction has an RXE format according to the IBM® z/Architecture.

9

9. The computer program product of claim 1 , wherein safe indicates that use of a larger data format would not produce a different value or quantum.

10

10. The computer program product of claim 1 , wherein the machine instruction is in a format of one architecture and is emulated to execute on a processor having another architecture, said another architecture being different from said one architecture.

11

11. A computer system for determining whether a decimal floating point number is safe or unsafe, said computer system comprising: a memory; and a processor in communication with the memory, wherein the computer system is configured to perform a method, said method comprising: obtaining, by a processor of a processing environment, a machine instruction for execution, the machine instruction comprising an opcode and a register field; obtaining, by the processor, a first operand in a decimal floating point format, the first operand included in a register specified by the register field; and performing, by the processor, a function defined by the opcode of the machine instruction of determining whether the first operand is a safe decimal floating point number or is a potentially unsafe decimal floating point number, said function comprising: determining, by the processor, a data group and a sign for the first operand; determining, by the processor, a plurality of second operand bits using one or more other fields of the machine instruction, each bit of the plurality of second operand bits corresponding to a data group and sign combination; selecting, by the processor, a bit of the plurality of second operand bits based on the data group and sign determined for the first operand; determining, by the processor, a value of the selected bit; and setting, by the processor, a condition code based on the value of the selected bit, the condition code indicating whether a result of a floating point operation is safe or potentially unsafe, wherein unsafe indicates that use of a larger data format would produce a different value or quantum.

12

12. The computer system of claim 11 , wherein the register specified by the register field comprises a floating point register.

13

13. The computer system of claim 11 , wherein the one or more other fields include an index field, a base field and a displacement value.

14

14. The computer system of claim 13 , wherein contents of a register specified by the index field, contents of a register specified by the base field, and the displacement value are added together to produce a result comprising 64 bits, and wherein bits 0 - 51 are ignored, the plurality of second operand bits comprise bits 52 - 63 , and wherein each bit of bits 52 - 63 corresponds to a particular data group and sign combination.

15

15. The computer system of claim 14 , wherein: bit 52 corresponds to a data group having the characteristics of finite number, zero significand, and nonextreme exponent, and to a sign of positive; bit 53 corresponds to a data group having the characteristics of finite number, zero significand, and nonextreme exponent, and to a sign of negative; bit 54 corresponds to a data group having the characteristics of finite number, zero significand, and extreme exponent, and to a sign of positive; bit 55 corresponds to a data group having the characteristics of finite number, zero significand, and extreme exponent, and to a sign of negative; bit 56 corresponds to a data group having the characteristics of finite number, nonzero significand, and extreme exponent, and to a sign of positive; bit 57 corresponds to a data group having the characteristics of finite number, nonzero significand, and extreme exponent, and to a sign of negative; bit 58 corresponds to a data group having the characteristics of finite number, nonzero significand, nonextreme exponent, and zero leftmost digit in the significand, and to a sign of positive; bit 59 corresponds to a data group having the characteristics of finite number, nonzero significand, nonextreme exponent, and zero leftmost digit in the significand, and to a sign of negative; bit 60 corresponds to a data group having the characteristics of finite number, nonzero significand, nonextreme exponent and nonzero leftmost digit in the significand, and to a sign of positive; bit 61 corresponds to a data group having the characteristics of finite number, nonzero significand, nonextreme exponent and nonzero leftmost digit in the significand, and to a sign of negative; bit 62 corresponds to a data group having the characteristics of infinity or not a number, and to a sign of positive; and bit 63 corresponds to a data group having the characteristics of infinity or not a number, and to a sign of negative.

16

16. The computer system of claim 13 , wherein the machine instruction comprises 48 bits, and wherein the opcode comprises bit 0 - 7 and 40 - 47 , the register field comprises bits 8 - 11 , the index field comprises bits 12 - 15 , the base field comprises bits 16 - 19 , and the displacement field comprises bits 20 - 31 .

17

17. The computer system of claim 11 , wherein the condition code indicates whether characteristics of a value specified in the first operand match one or more selected conditions, and wherein a match indicates the value is safe or potentially unsafe depending on the selected conditions.

18

18. The computer system of claim 11 , wherein the computer architecture is the IBM® z/Architecture, and wherein the machine instruction has an RXE format according to the IBM® z/Architecture.

19

19. The computer system of claim 11 , wherein safe indicates that use of a larger data format would not produce a different value or quantum.

20

20. The computer system of claim 11 , wherein the machine instruction is in a format of one architecture and is emulated to execute on a processor having another architecture, said another architecture being different from said one architecture.

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Patent Metadata

Filing Date

December 12, 2017

Publication Date

June 18, 2019

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