Patentable/Patents/US-10355092
US-10355092

Silicon epitaxial wafer and method of producing silicon epitaxial wafer

PublishedJuly 16, 2019
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

A silicon epitaxial wafer including: a second intermediate epitaxial layer on a silicon substrate produced by being cut from a silicon single crystal ingot grown by the CZ method so as to have a carbon concentration ranging from 3×1016 to 2×1017 atoms/cm3, a first intermediate epitaxial layer doped with a dopant, and an epitaxial layer of a device forming region stacked on the first intermediate epitaxial layer, and to a method of producing this wafer. Also providing an industrially excellent silicon epitaxial wafer that is produced with a silicon substrate doped with carbon and used as a semiconductor device substrate such as a memory, a logic, or a solid-state image sensor, and a method of producing this silicon epitaxial wafer.

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Filing Date

March 28, 2014

Publication Date

July 16, 2019

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