Patentable/Patents/US-10418291
US-10418291

Induced warpage of a thermal conductor

PublishedSeptember 17, 2019
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

Particular embodiments described herein provide for a silicon layer, where the silicon layer includes a profile and a thermal conductor coupled to the silicon layer, where the thermal conductor includes one or more residual stresses. The thermal conductor is modified based on the one or more residual stress such that when pressure is applied to the thermal conductor, a profile of the thermal conductor at least approximately matches the profile of the silicon layer. In an example, the thermal conductor is modified by removing material from one or more areas of the thermal conductor and the thermal conductor is coupled to the silicon layer by one or more pressure inducing mechanisms.

Patent Claims
10 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A method comprising: determining a profile for a warped silicon layer; identifying one or more residual stresses in a thermal conductor, wherein a profile of the thermal conductor does not match the profile of the warped silicon layer; modifying the thermal conductor based on the identified one or more residual stresses such that when pressure is applied to the thermal conductor, a modified profile of the thermal conductor at least approximately matches the profile of the warped silicon layer; and coupling the thermal conductor to the warped silicon layer.

2

2. The method of claim 1 , further comprising: coupling the thermal conductor to the warped silicon layer using one or more pressure inducing mechanisms.

3

3. The method of claim 1 , wherein modifying the thermal conductor includes removing material from one or more areas of the thermal conductor.

4

4. The method of claim 1 , wherein the profile of the warped silicon layer is determined by using an optical scan.

5

5. The method of claim 1 , wherein the profile of the warped silicon layer is determined by determining warpage of a package that includes the warped silicon layer and estimating the profile of the warped silicon layer.

6

6. The method of claim 1 , wherein the warped silicon layer is over a substrate.

7

7. The method of claim 3 , wherein removing material from one or more areas of the thermal conductor causes a redistribution of internal stresses of the thermal conductor.

8

8. The method of claim 1 , wherein modifying the thermal conductor includes removing material from one or more areas of the thermal conductor, wherein the one or more areas where the material is removed is based, at least partially, on the identified one or more residual stresses.

9

9. The method of claim 1 , wherein modifying the thermal conductor includes removing material from one or more areas of the thermal conductor, wherein the one or more areas where the material is removed are located proximate to at least a portion of the identified one or more residual stresses.

10

10. The method of claim 1 , wherein modifying the thermal conductor includes removing material from one or more areas of the thermal conductor, wherein at least a portion of the one or more areas where the material is removed includes at least a portion of the identified one or more residual stresses.

Classification Codes (CPC)

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Patent Metadata

Filing Date

September 29, 2017

Publication Date

September 17, 2019

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Cite as: Patentable. “Induced warpage of a thermal conductor” (US-10418291). https://patentable.app/patents/US-10418291

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