Patentable/Patents/US-10510418
US-10510418

Semiconductor device and operating method thereof

PublishedDecember 17, 2019
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

A semiconductor memory device includes a cell string, a common source line controller, and a page buffer. The cell string includes a plurality of memory cells coupled in series between a common source line and a bit line. In a read operation, the common source line controller provides a channel current to the cell string through the common source line. The page buffer senses data stored in a selected memory cell among the plurality of memory cells by sensing a current of the bit line when the channel current is provided. The common source line controller precharges the bit line by providing the channel current to the cell string through the common source line. After the bit line is precharged, the page buffer senses the data stored in the selected memory cell by transmitting a voltage of the bit line to a sensing node.

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Patent Metadata

Filing Date

March 2, 2018

Publication Date

December 17, 2019

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Semiconductor device and operating method thereof