A Magnetic Tunnel Junction (MTJ) can include an annular structure and a planar reference magnetic layer disposed about the annular structure. The annular structure can include an annular non-magnetic layer disposed about an annular conductive layer, an annular free magnetic layer disposed about the annular non-magnetic layer, and an annular tunnel insulator disposed about the annular free magnetic layer. The planar reference magnetic layer can be separated from the free magnetic layer by the annular tunnel barrier layer.
Legal claims defining the scope of protection. Each claim is shown in both the original legal language and a plain English translation.
1. A memory device comprising: an array of Magnetic Tunnel Junction (MTJ) cells arranged in cell columns and cell rows in a plurality of cell levels, wherein the MTJ cells in corresponding cell column and cell row positions in the plurality of cell levels are coupled together in cell strings, each MTJ cell includes; an annular structure including an annular tunnel insulator disposed about an annular free magnetic layer; a planar reference magnetic layer disposed about the annular structure; a planar non-magnetic insulator layer disposed on a first side of the planar reference magnetic layer and about the annular structure; and another respective planar non-magnetic insulator layer disposed on a second side of the planar reference magnetic layer and about the annular structure.
This invention relates to non-volatile memory devices and specifically addresses the structure of Magnetic Tunnel Junction (MTJ) cells within such devices. The problem addressed is the need for improved memory cell structures that can be integrated into multi-level, string-based memory arrays. The memory device comprises an array of MTJ cells organized into columns and rows across multiple levels. MTJ cells located at the same column and row positions in different levels are electrically connected to form cell strings. Each individual MTJ cell has a unique structure designed for efficient operation. This structure includes an annular free magnetic layer surrounded by an annular tunnel insulator. A planar reference magnetic layer is positioned around this annular structure. Additionally, planar non-magnetic insulator layers are disposed on both sides of the planar reference magnetic layer, also surrounding the annular structure. This configuration allows for the creation of dense, multi-level memory arrays with robust MTJ cell components.
2. The memory device of claim 1 , wherein, a magnetic field of the planar reference magnetic layer has a fixed polarization substantially perpendicular to a major planar orientation of the planar reference magnetic layer; and a magnetic field of the annular free magnetic layer has a polarization substantially perpendicular to the major planar orientation of the planar reference magnetic layer and selectively switchable between being substantially parallel and substantially antiparallel to the magnetic field of the planar reference layer.
This invention relates to a memory device utilizing perpendicular magnetic anisotropy for data storage. The device addresses challenges in conventional magnetic memory technologies, such as spin-transfer torque magnetic random-access memory (STT-MRAM), where achieving high-density, low-power, and stable data storage is difficult due to limitations in magnetic layer configurations and switching mechanisms. The memory device includes a planar reference magnetic layer and an annular free magnetic layer. The planar reference magnetic layer has a fixed magnetic polarization oriented perpendicular to its major planar surface, providing a stable reference magnetization. The annular free magnetic layer, positioned adjacent to the reference layer, also has a magnetic polarization perpendicular to the planar surface but is switchable between two states: one where its magnetization is parallel to the reference layer's magnetization and another where it is antiparallel. This switching allows binary data storage (e.g., "0" and "1") based on the relative magnetic orientations. The perpendicular magnetic anisotropy in both layers ensures strong resistance to thermal fluctuations, enhancing data retention. The annular shape of the free magnetic layer may improve switching efficiency and reduce power consumption compared to traditional in-plane or fully planar designs. The device leverages spin-transfer torque or other mechanisms to selectively switch the free layer's magnetization, enabling non-volatile, high-density memory applications.
3. The memory device of claim 2 , wherein the magnetic field of the annular free magnetic layer is configured to switch to being substantially parallel to the magnetic field of the planar reference layer in response to a current flow in a first direction through the conductive annular layer and to switch to being substantially anti-parallel to the magnetic field of the planar reference layer in response to a current flow in a second direction through the conductive annular layer.
This invention relates to a memory device utilizing magnetic field switching for data storage. The device addresses the challenge of efficiently controlling the magnetic state of a memory cell using current-induced magnetic fields. The memory device includes an annular free magnetic layer and a planar reference layer, where the magnetic field of the annular layer can be switched between parallel and anti-parallel orientations relative to the reference layer. The switching is achieved by passing current through a conductive annular layer in opposite directions. When current flows in a first direction, the magnetic field of the annular free layer aligns substantially parallel to the reference layer, representing one data state. Conversely, when current flows in a second, opposite direction, the magnetic field becomes substantially anti-parallel, representing a different data state. This mechanism enables non-volatile data storage by leveraging current-induced magnetic field interactions, providing a compact and scalable memory architecture. The device avoids the need for external magnetic fields or complex switching circuits, improving energy efficiency and integration density. The annular geometry of the free magnetic layer enhances magnetic field confinement, ensuring reliable switching and minimizing interference between adjacent memory cells. This approach is particularly useful in high-density magnetic memory applications, such as MRAM (Magnetic Random Access Memory), where fast, low-power, and scalable data storage solutions are required.
4. A device comprising: a first plurality of annular structures, each annular structure including an annular tunnel insulator disposed about an annular free magnetic layer; a first planar reference magnetic layer disposed about the first plurality of annular structures and separated from the free magnetic layers of the first plurality of annular structures by the annular tunnel barrier layers of the first plurality of annular structures; a first non-magnetic insulator layer disposed about the first plurality of annular structures and on a first side of the first planar reference magnetic layer; a second non-magnetic insulator layer disposed about the first plurality of annular structures and on a second side of the first planar reference magnetic layer; a second plurality of annular structures axially aligned with respective ones the first plurality of annular structures; a second planar reference magnetic layer disposed about the second plurality of annular structures and separated from the free magnetic layer of the second plurality of annular structures by the annular tunnel barrier layers of the second plurality of annular structures; a third non-magnetic insulator layer disposed about the second plurality of annular structures and between the second non-magnetic insulator layer and a first side of the second planar reference magnetic layer; and a fourth non-magnetic insulator layer disposed about the second plurality of annular structures and on a second side of the second planar reference magnetic layer.
The invention relates to a magnetic storage device, specifically a multi-layered structure for high-density data storage. The device addresses the challenge of increasing storage density while maintaining reliable magnetic tunneling junction (MTJ) performance. The device comprises two sets of annular (ring-shaped) structures, each containing a free magnetic layer surrounded by an annular tunnel insulator. These structures are arranged in axial alignment, forming stacked layers. A planar reference magnetic layer is positioned around each set of annular structures, separated from the free magnetic layers by the tunnel insulators. Non-magnetic insulator layers are placed on either side of each planar reference magnetic layer, with additional insulator layers between the two sets of annular structures. The design enables precise magnetic coupling between the free and reference layers while minimizing interference, improving data storage density and read/write efficiency. The stacked annular configuration allows for compact, high-capacity magnetic storage with enhanced signal integrity.
5. The device of claim 4 , wherein: the first plurality of annular structures are arranged in columns and rows; and the second plurality of annular structures are arranged in columns and rows, and axially aligned with respective ones the first plurality of annular structures.
The invention relates to a device with two sets of annular structures, each arranged in a grid-like pattern of columns and rows. The first set of annular structures is positioned in a specific arrangement, and the second set is similarly arranged in columns and rows but is axially aligned with the first set. This alignment ensures that each annular structure in the second set corresponds directly to one in the first set. The device likely addresses challenges in structural alignment, precision manufacturing, or mechanical coupling, where maintaining exact positional relationships between multiple annular components is critical. The grid-based arrangement may improve stability, reduce misalignment, or enhance functional integration in applications such as filters, sensors, or mechanical assemblies. The invention focuses on the spatial organization of these structures to achieve consistent performance or interaction between the two sets. The axial alignment ensures that the annular structures maintain their relative positions, which could be essential for fluid flow, signal transmission, or mechanical load distribution. The device may be used in industries requiring precise component alignment, such as aerospace, automotive, or medical devices.
6. A memory device comprising: an array of Magnetic Tunnel Junction (MTJ) cells arranged in a plurality of cell levels coupled together in cell strings, the MTJ cells in each cell string include; an annular structure including an annular tunnel insulator disposed about an annular free magnetic layer; corresponding planar reference magnetic layers disposed about the annular structure and aligned with a corresponding ones of the plurality of portions of the free magnetic layer; one or more planar non-magnetic insulator layers disposed on a first side of each of the plurality of planar reference magnetic layers and about the annular structure; and one or more other planar non-magnetic insulator layers disposed on a second side of each of the plurality of planar reference magnetic layers and about the annular structure.
This invention relates to a memory device utilizing Magnetic Tunnel Junction (MTJ) cells arranged in a three-dimensional architecture. The device addresses challenges in scaling conventional MTJ-based memory by introducing a multi-level cell structure with improved magnetic stability and read/write efficiency. The memory device includes an array of MTJ cells organized into multiple cell levels, where each level is coupled to form cell strings. Each MTJ cell features an annular (ring-shaped) structure comprising an annular tunnel insulator surrounding an annular free magnetic layer. Planar reference magnetic layers are positioned around the annular structure, aligned with specific portions of the free magnetic layer to enhance magnetic coupling. Non-magnetic insulator layers are deposited on both sides of the reference magnetic layers and around the annular structure to electrically isolate the components while maintaining structural integrity. This design enables high-density data storage by stacking multiple cell levels vertically, improving memory capacity and performance. The annular configuration of the free magnetic layer and the surrounding planar reference layers optimize magnetic tunnel junction efficiency, reducing power consumption and improving reliability in high-density memory applications.
7. The memory device of claim 6 , further comprising: a plurality of blocks of the array of MTJ cells arranged in block columns and block rows.
The invention relates to memory devices utilizing magnetic tunnel junction (MTJ) cells, specifically addressing the organization and management of memory blocks within such devices. MTJ cells are used for non-volatile data storage, where data is stored based on the magnetic orientation of the cells. A key challenge in MTJ-based memory is efficiently organizing and accessing memory blocks to optimize performance, reliability, and storage density. The memory device includes an array of MTJ cells, where each cell stores data based on its magnetic state. The device further includes a plurality of blocks of these MTJ cells, arranged in a grid-like structure with block columns and block rows. This block-based organization allows for efficient data management, enabling operations such as reading, writing, and erasing to be performed at the block level rather than individual cells. The block structure improves data handling by grouping cells into larger units, which can enhance error correction, wear leveling, and overall memory efficiency. Additionally, the block arrangement may facilitate parallel access or hierarchical addressing, improving speed and reducing latency. The invention aims to provide a scalable and reliable memory architecture for MTJ-based storage systems.
8. The memory device of claim 7 , further comprising: a plurality of global bit lines, each global bit line coupled to a set of bit lines in a corresponding column of the plurality of blocks of the array of MTJ cells.
This invention relates to memory devices, specifically those using magnetic tunnel junction (MTJ) cells arranged in an array. The problem addressed is efficient data access and management in high-density memory arrays, particularly in systems where multiple blocks of MTJ cells are organized into columns. The invention improves upon prior art by incorporating a plurality of global bit lines, each connected to a set of bit lines in a corresponding column across multiple blocks of the MTJ array. This configuration allows for parallel data access and reduces latency by enabling simultaneous operations across different blocks. The global bit lines enhance scalability and performance by consolidating data paths, minimizing signal propagation delays, and improving overall memory bandwidth. The design is particularly useful in non-volatile memory systems where low-power, high-speed access is critical, such as in embedded storage or cache memory applications. The invention ensures efficient routing of data signals while maintaining the integrity of stored information in the MTJ cells.
9. The memory device of claim 6 , wherein the annular structure comprises a conical structure including a conical non-magnetic layer disposed about a conical portion of the conductive layer, a conical free magnetic layer disposed about the conical non-magnetic layer, and a conical tunnel barrier layer disposed about the conical free magnetic layer.
This invention relates to a memory device incorporating a conical annular structure for improved magnetic storage. The device addresses challenges in conventional magnetic memory, such as limited data density and stability, by utilizing a conical geometry to enhance magnetic tunnel junction (MTJ) performance. The conical structure includes a conductive layer with a conical portion, surrounded by a conical non-magnetic layer. A conical free magnetic layer is disposed about the non-magnetic layer, and a conical tunnel barrier layer is positioned around the free magnetic layer. This configuration enables efficient spin-polarized electron tunneling, improving read/write operations and data retention. The conical design increases the surface area for magnetic interactions while maintaining compact dimensions, allowing for higher storage density. The tunnel barrier layer ensures reliable separation between the free magnetic layer and adjacent components, reducing leakage and enhancing signal integrity. The overall structure leverages geometric advantages to optimize magnetic switching and minimize power consumption, making it suitable for advanced non-volatile memory applications.
10. The memory device of claim 6 , wherein, a magnetic field of the planar reference magnetic layer has a fixed polarization substantially perpendicular to a major planar orientation of the planar reference magnetic layer; and a magnetic field of the annular free magnetic layer has a polarization substantially perpendicular to the major planar orientation of the planar reference magnetic layer and selectively switchable between being substantially parallel and substantially antiparallel to the magnetic field of the planar reference layer.
This invention relates to a memory device utilizing perpendicular magnetic anisotropy for data storage. The device addresses challenges in achieving stable, high-density magnetic memory by employing a planar reference magnetic layer and an annular free magnetic layer, both with magnetic fields polarized perpendicular to their major planar orientation. The planar reference layer has a fixed polarization, providing a stable reference for data storage. The annular free magnetic layer, which surrounds the reference layer, has a switchable polarization that can be aligned either parallel or antiparallel to the reference layer's field. This configuration enables reliable data storage through magnetic tunnel junctions or similar mechanisms, where the relative orientation of the two layers determines the memory state. The perpendicular polarization enhances data retention and reduces interference between adjacent memory cells, improving storage density and reliability. The annular shape of the free layer may also optimize magnetic field confinement and switching efficiency. This design is particularly useful in non-volatile memory applications, such as MRAM (Magnetic Random Access Memory), where fast, low-power, and durable data storage is required.
11. The memory device of claim 10 , wherein the magnetic field of the annular free magnetic layer is configured to switch to being substantially parallel to the magnetic field of the planar reference layer in response to a current flow in a first direction through the conductive annular layer and to switch to being substantially anti-parallel to the magnetic field of the planar reference layer in response to a current flow in a second direction through the conductive annular layer.
This invention relates to magnetic memory devices, specifically those using spin-transfer torque (STT) switching mechanisms for data storage. The problem addressed is the need for efficient and reliable magnetic switching in memory cells, particularly in devices where the magnetic free layer is annular (ring-shaped) rather than planar. Conventional STT memory cells often struggle with inconsistent switching behavior due to geometric constraints and magnetic field interactions. The invention describes a memory device with an annular free magnetic layer and a planar reference layer. The annular free layer's magnetic field can be switched between two stable states relative to the planar reference layer's magnetic field. When current flows in a first direction through a conductive annular layer adjacent to the free layer, the free layer's magnetic field aligns substantially parallel to the reference layer's field. Conversely, when current flows in the opposite direction, the free layer's magnetic field aligns substantially anti-parallel to the reference layer's field. This bidirectional switching enables binary data storage (e.g., "0" and "1" states) by controlling current direction. The annular geometry improves switching efficiency and reduces stray magnetic field effects compared to planar designs. The device leverages spin-transfer torque, where spin-polarized current induces magnetic moment changes in the free layer, ensuring low-power and high-speed operation. This configuration is particularly useful in high-density magnetic random-access memory (MRAM) applications.
12. A device comprising: a plurality of annular structures, each annular structure including a first annular free magnetic layer and a second annular free magnetic layer separated by a non-magnetic separator layer, and an annular tunnel insulator disposed about the plurality of annular free magnetic layers and the non-magnetic separator layer; a first planar reference magnetic layer disposed about the plurality of annular structures and aligned with the first annular free magnetic layer; a first non-magnetic insulator layer disposed about the plurality of annular structures and on a first side of the first planar reference magnetic layer; and a second non-magnetic insulator layer disposed about the plurality annular structures and on a second side of the first planar reference magnetic layers; a second planar reference magnetic layer disposed about the plurality of annular structures and aligned with the second annular free magnetic layer; a third non-magnetic insulator layer disposed about the plurality of annular structures and between the second non-magnetic insulator layer and a first side of the second planar reference magnetic layer; a fourth non-magnetic insulator layer disposed about the plurality of annular structures and on a second side of the second planar reference magnetic layer.
This invention relates to magnetic storage devices, specifically a multi-layered annular magnetic structure for high-density data storage. The device addresses challenges in conventional magnetic storage by improving data density and read/write efficiency through a novel arrangement of magnetic layers. The device includes multiple annular (ring-shaped) structures, each containing two free magnetic layers separated by a non-magnetic separator layer. These annular structures are surrounded by an annular tunnel insulator, facilitating magnetic tunneling effects. Two planar reference magnetic layers are positioned around the annular structures, with the first aligned with the first annular free magnetic layer and the second aligned with the second annular free magnetic layer. Non-magnetic insulator layers are placed on either side of each planar reference magnetic layer, with additional insulators separating the second planar reference layer from the first. This configuration allows for precise magnetic coupling and tunneling, enhancing data storage capacity and stability. The layered design enables independent control of magnetic states in the annular and planar layers, improving read/write operations and reducing interference. The overall structure supports high-density data storage with improved reliability and performance.
13. The device of claim 12 , wherein the plurality; of annular structures are arranged in columns and rows.
A system for organizing and manipulating annular structures, such as rings or circular components, is designed to improve spatial efficiency and accessibility in storage or processing applications. The invention addresses challenges in managing multiple annular structures, such as rings, where traditional arrangements may lead to inefficient use of space or difficulty in retrieving individual components. The device includes a plurality of annular structures, each configured to hold or support objects, and these structures are arranged in a grid-like pattern with columns and rows. This arrangement allows for systematic organization, easy identification, and efficient retrieval of individual annular structures. The grid layout may be adjustable to accommodate different sizes or quantities of annular structures, enhancing flexibility in use. The system may also include mechanisms for rotating or repositioning the annular structures to optimize access or processing. This structured arrangement is particularly useful in automated systems, manufacturing lines, or storage facilities where precise handling of annular components is required. The invention improves workflow efficiency by reducing search time and minimizing errors in component retrieval.
14. The device of claim 12 , further comprising: a non-magnetic metal layer disposed between the second non-magnetic insulator layer and the third non-magnetic insulator layer.
This invention relates to a magnetic device with improved structural and functional properties. The device includes a magnetic layer, a first non-magnetic insulator layer, a second non-magnetic insulator layer, and a third non-magnetic insulator layer. The magnetic layer is positioned adjacent to the first non-magnetic insulator layer, which is in turn adjacent to the second non-magnetic insulator layer. The third non-magnetic insulator layer is positioned adjacent to the second non-magnetic insulator layer. A non-magnetic metal layer is disposed between the second and third non-magnetic insulator layers. This configuration enhances the device's performance by improving electrical insulation, reducing magnetic interference, and increasing thermal stability. The non-magnetic metal layer provides additional structural support and may also facilitate heat dissipation. The device is particularly useful in applications requiring precise magnetic field control, such as in spintronic devices, magnetic sensors, or memory storage systems. The layered structure ensures efficient charge transport while minimizing unwanted magnetic coupling between layers. The non-magnetic metal layer further enhances the device's durability and operational reliability in high-performance environments.
15. The device of claim 12 , further comprising: the plurality of annular structures arranged in columns and rows in the first and second planar reference magnetic layers; and a plurality of insulator regions disposed in the plurality of planar reference magnetic layers between a respective pair of columns of the plurality of annular structure.
This invention relates to magnetic storage devices, specifically addressing challenges in data storage density and stability. The device includes a magnetic storage medium with multiple annular structures, such as magnetic rings or loops, arranged in a grid pattern with columns and rows. These structures are embedded within first and second planar reference magnetic layers, which provide magnetic reference points for read/write operations. The annular structures are separated by insulator regions, which are positioned between adjacent columns of the structures. These insulator regions electrically isolate the columns while maintaining magnetic coupling between the annular structures and the reference layers. The arrangement improves data storage density by enabling compact, high-capacity storage while ensuring stable magnetic states for reliable read/write operations. The insulator regions prevent unwanted electrical interference between columns, enhancing overall device performance. This design is particularly useful in high-density magnetic storage applications where minimizing crosstalk and maintaining magnetic integrity are critical.
16. The memory device of claim 1 , further comprising: a plurality of bit lines, wherein respective bit lines are disposed on and electrically coupled to respective planar magnetic layers of respective cell levels; and a plurality of select elements arranged in select columns and select rows, wherein respective selector elements are coupled to respective strings of MTJ cells in corresponding cell column and cell row positions.
This invention relates to a memory device with a three-dimensional (3D) array of magnetic tunnel junction (MTJ) cells, addressing challenges in scaling and performance of non-volatile memory. The device includes multiple cell levels, each with planar magnetic layers forming MTJ cells. A plurality of bit lines are disposed on and electrically coupled to the planar magnetic layers of each cell level, enabling data read/write operations. The device also features select elements arranged in select columns and rows, where each select element is coupled to a string of MTJ cells in corresponding cell column and row positions. These select elements control access to specific MTJ cell strings, allowing selective activation or deactivation during memory operations. The arrangement ensures efficient data storage and retrieval while maintaining scalability and reliability in high-density memory architectures. The invention improves upon traditional memory designs by integrating vertical stacking of MTJ cells with precise control mechanisms, enhancing storage capacity and operational efficiency.
17. The memory device of claim 1 , wherein the annular structure further includes an annular non-magnetic layer disposed about an annular conductive layer, and the annular free magnetic layer disposed about the annular non-magnetic layer.
This invention relates to memory devices, specifically magnetic memory devices such as magnetic random access memory (MRAM). The problem addressed is improving the stability and performance of magnetic memory cells, particularly in structures where magnetic layers are used to store data. The memory device includes a magnetic tunnel junction (MTJ) structure with an annular (ring-shaped) configuration. The annular structure comprises an annular conductive layer, which serves as an electrode, surrounded by an annular non-magnetic layer. This non-magnetic layer is further surrounded by an annular free magnetic layer, which is the layer whose magnetization direction can be switched to represent data bits. The annular design helps enhance magnetic stability by reducing demagnetizing fields and improving switching efficiency. The non-magnetic layer acts as a spacer, ensuring proper separation between the conductive and free magnetic layers while maintaining electrical insulation where needed. This configuration allows for more reliable data storage and retrieval in high-density memory applications. The annular structure may also include additional layers, such as a reference magnetic layer and a tunnel barrier, to complete the MTJ stack. The overall design aims to improve data retention, reduce power consumption, and enhance scalability in advanced memory technologies.
18. The device of claim 4 , wherein each annular structure further includes an annular non-magnetic layer disposed about an annular conductive layer, and the annular free magnetic layer disposed about the annular non-magnetic layer.
This invention relates to magnetic storage devices, specifically to an improved structure for magnetic recording heads used in hard disk drives. The problem addressed is enhancing data storage density and reliability by improving the magnetic field generation and control in the recording head. The device includes a magnetic recording head with multiple annular structures, each comprising an annular conductive layer surrounded by an annular non-magnetic layer, which is further surrounded by an annular free magnetic layer. The annular conductive layer generates a magnetic field when current flows through it, while the non-magnetic layer electrically insulates the conductive layer from the free magnetic layer. The free magnetic layer, being magnetically responsive, focuses and directs the magnetic field toward the recording medium, enabling precise data writing. The non-magnetic layer ensures that the conductive layer's current does not directly influence the free magnetic layer, preventing unwanted magnetic interference. This layered arrangement improves magnetic field uniformity and reduces stray fields, leading to higher data density and better signal integrity. The annular design allows for compact, high-performance recording heads suitable for advanced storage technologies.
19. The device of claim 4 , further comprising: a first bit line coupled to the first planar reference magnetic layer; and a second bit line coupled to the second planar reference magnetic layer.
This invention relates to magnetic memory devices, specifically spin-transfer torque magnetic random access memory (STT-MRAM), which faces challenges in achieving stable and efficient switching of magnetic states. The device includes a magnetic tunnel junction (MTJ) structure with a free magnetic layer, a first planar reference magnetic layer, and a second planar reference magnetic layer. The first and second planar reference magnetic layers are magnetically coupled to the free magnetic layer, allowing for controlled switching of the free layer's magnetization direction. The device further includes a first bit line coupled to the first planar reference magnetic layer and a second bit line coupled to the second planar reference magnetic layer. These bit lines enable independent electrical control of the reference layers, facilitating precise manipulation of the free layer's magnetic state. The configuration improves switching reliability and reduces power consumption by leveraging spin-transfer torque effects, making it suitable for high-density, non-volatile memory applications. The use of planar reference layers and separate bit lines enhances scalability and performance in advanced memory technologies.
20. The memory device of claim 6 , wherein the MTJ cells are arranged in corresponding cell column and cell row positions in the plurality of cell levels.
This invention relates to a multi-level memory device incorporating magnetic tunnel junction (MTJ) cells. The device addresses challenges in high-density memory storage by vertically stacking multiple layers of MTJ cells to increase storage capacity without significantly expanding the device footprint. Each MTJ cell is positioned at specific column and row intersections within each stacked level, ensuring precise alignment and electrical connectivity. The arrangement allows for efficient data access and minimizes interference between adjacent cells. The device leverages the non-volatile nature of MTJ cells, which retain data without power, making it suitable for applications requiring low-power, high-density storage. The vertical stacking technique improves scalability and performance compared to traditional planar memory architectures. The invention also includes peripheral circuitry to manage data read/write operations across the stacked cell levels, ensuring reliable functionality. This design enhances memory density while maintaining compatibility with existing semiconductor manufacturing processes. The precise positioning of MTJ cells in each level ensures consistent electrical characteristics and reduces manufacturing defects. The overall structure enables compact, high-capacity memory solutions for advanced computing and storage systems.
21. The memory device of claim 20 , wherein the annular structure further includes an annular non-magnetic layer disposed about an annular conductive layer, an annular free magnetic layer disposed about the annular non-magnetic layer, and wherein the annular free magnetic layer separated in each annular structure separated from each other by corresponding ones of a plurality of non-magnetic separator layers.
This invention relates to a memory device incorporating annular magnetic structures for data storage. The device addresses challenges in high-density magnetic memory, particularly in achieving stable, scalable, and reliable magnetic storage elements. The memory device includes an array of annular (ring-shaped) structures, each comprising multiple layers arranged concentrically. Each annular structure features an annular conductive layer surrounded by an annular non-magnetic layer, which is further encased by an annular free magnetic layer. The free magnetic layer in each annular structure is separated from adjacent structures by non-magnetic separator layers, ensuring electrical and magnetic isolation. This configuration enables precise control of magnetic domains within the free magnetic layer, allowing for high-density data storage with minimal interference between adjacent storage elements. The annular design improves magnetic stability and reduces stray fields, enhancing read/write reliability. The non-magnetic separator layers prevent unwanted magnetic coupling while maintaining structural integrity. This invention is particularly useful in advanced magnetic random-access memory (MRAM) and other non-volatile memory technologies requiring compact, high-performance storage elements.
22. The memory device of claim 21 , further comprising: a plurality of bit lines, wherein respective bit lines are disposed on and electrically coupled to respective planar magnetic layers of respective cell levels; and a plurality of select elements arranged in select columns and select rows, wherein respective selector elements are coupled to respective strings of cells in corresponding cell column and cell row positions.
This invention relates to a memory device with a three-dimensional (3D) architecture, specifically addressing challenges in scaling and performance of non-volatile memory systems. The device includes multiple cell levels stacked vertically, each level containing an array of memory cells. Each memory cell comprises a planar magnetic layer that stores data magnetically, enabling high-density storage with low power consumption. The memory cells are arranged in a cross-point architecture, where each cell is positioned at the intersection of a word line and a bit line. The bit lines are disposed on and electrically coupled to the planar magnetic layers of each cell level, facilitating efficient data read and write operations. Additionally, the device includes select elements arranged in select columns and select rows. Each select element is coupled to a string of memory cells in corresponding cell column and row positions, allowing precise control over individual memory cells during access operations. This configuration enhances scalability, reduces interference between cells, and improves overall memory performance. The invention is particularly useful for high-capacity, low-power memory applications such as solid-state drives and embedded memory systems.
23. The memory device of claim 12 , wherein each annular structure further includes an annular non-magnetic layer disposed about an annular conductive layer, and wherein the first and second annular free magnetic layers are disposed about the annular non-magnetic.
This invention relates to memory devices, specifically magnetic memory devices such as spin-transfer torque magnetic random access memory (STT-MRAM). The problem addressed is improving data storage reliability and performance in such devices by optimizing the magnetic structure to enhance stability and switching efficiency. The memory device includes multiple annular (ring-shaped) magnetic structures, each containing a free magnetic layer that stores data by its magnetization direction. To improve functionality, each annular structure further includes an annular non-magnetic layer surrounding an annular conductive layer. The first and second annular free magnetic layers are positioned around this non-magnetic layer. This configuration enhances magnetic coupling and reduces interference, improving data retention and switching speed. The conductive layer facilitates current flow for spin-transfer torque switching, while the non-magnetic layer ensures proper magnetic separation and stability. The annular design allows for high-density data storage with reduced stray fields, making the device suitable for advanced memory applications. The invention focuses on the structural arrangement to achieve reliable and efficient magnetic switching in memory cells.
24. The memory device of claim 23 , wherein: the first planar reference magnetic layer is separated from the free magnetic layers of the plurality of annular structures by the annular tunnel barrier layer of the plurality of annular structures and the first planar reference magnetic layer; and the second planar reference magnetic layer is separated from the free magnetic layers of the plurality of annular structures by the annular tunnel barrier layers of the plurality of annular structures, and the second planar reference magnetic layer.
This invention relates to a memory device with a plurality of annular magnetic structures for data storage. The device addresses challenges in magnetic random-access memory (MRAM) by improving data retention and read/write efficiency through a unique arrangement of magnetic layers. The memory device includes multiple annular structures, each comprising a free magnetic layer surrounded by an annular tunnel barrier layer. These structures are positioned between two planar reference magnetic layers. The first planar reference magnetic layer is separated from the free magnetic layers by the annular tunnel barrier layers and the first planar reference magnetic layer itself. Similarly, the second planar reference magnetic layer is separated from the free magnetic layers by the annular tunnel barrier layers and the second planar reference magnetic layer. This configuration enhances magnetic coupling and tunneling magnetoresistance, enabling stable data storage and efficient read operations. The annular design allows for high-density data storage while maintaining reliable magnetic switching. The device leverages spin-transfer torque or spin-orbit torque mechanisms for writing data, ensuring low-power operation. The overall structure improves scalability and performance in non-volatile memory applications.
25. The memory device of claim 24 , further comprising: a first hit line coupled to the first planar reference magnetic layer; and a second bit line coupled to the second planar reference magnetic layer.
This invention relates to magnetic memory devices, specifically addressing challenges in read operations for spin-transfer torque magnetic random-access memory (STT-MRAM). The device includes a magnetic tunnel junction (MTJ) stack with a free magnetic layer, a first planar reference magnetic layer, and a second planar reference magnetic layer. The first and second planar reference layers are magnetically coupled to the free layer, allowing for differential read operations that improve signal integrity and reduce read disturbances. The device further includes a first bit line coupled to the first planar reference layer and a second bit line coupled to the second planar reference layer. These bit lines enable independent control of the reference layers during read operations, facilitating differential sensing by comparing signals from the two reference layers. This design enhances read reliability by mitigating thermal noise and process variations, while also reducing power consumption by avoiding high-voltage read operations. The differential read scheme improves scalability and performance in high-density memory arrays.
26. The memory device of claim 16 , further comprising: a plurality of blocks of the array of MTJ cells arranged in block columns and block rows.
A memory device includes an array of magnetoresistive junction (MTJ) cells configured to store data based on the magnetic orientation of the cells. The device addresses challenges in high-density memory storage, such as scalability, reliability, and efficient data access. The MTJ cells are organized into a plurality of blocks, which are further arranged in block columns and block rows. This block-based structure enhances memory management by enabling selective access, erasure, or programming of specific blocks, improving overall performance and endurance. The arrangement allows for efficient addressing and control of memory operations, reducing latency and power consumption. The device may also include peripheral circuitry to manage data transfer, error correction, and other memory operations. The block-based organization supports scalable memory architectures, making it suitable for high-capacity storage applications. The MTJ cells' non-volatile nature ensures data retention without continuous power, making the device ideal for applications requiring persistent storage. The block columns and block rows facilitate parallel access, further optimizing read and write operations. This structure also simplifies defect management and wear leveling, extending the device's lifespan. The memory device is particularly useful in embedded systems, solid-state drives, and other storage solutions where high density, low power, and fast access are critical.
27. The memory device of claim 26 , further comprising: a plurality of global bit lines, each global bit line coupled to a set of bit lines in a corresponding column of the plurality of blocks of the array of MTJ cells.
This invention relates to memory devices, specifically those using magnetic tunnel junction (MTJ) cells arranged in an array. The problem addressed is efficient data access and management in high-density memory arrays, particularly in reducing signal interference and improving read/write operations across multiple memory blocks. The memory device includes an array of MTJ cells organized into multiple blocks, each block containing rows and columns of MTJ cells. Each column within a block is connected to a set of bit lines, which are further coupled to global bit lines. The global bit lines serve as high-level data pathways, allowing data to be transferred between the memory array and external circuitry. By coupling each global bit line to a corresponding column of bit lines across multiple blocks, the design enables parallel data access, reducing latency and improving throughput. The global bit lines also help isolate individual blocks during operations, minimizing interference and enhancing reliability. This architecture is particularly useful in high-density memory systems where efficient data routing and low-power operation are critical. The invention improves upon traditional memory designs by optimizing the connection between local and global bit lines, ensuring faster and more reliable data transfer in large-scale memory arrays.
28. The memory device of claim 16 , wherein the plurality of bit lines are peripherally disposed about the array of MTJ cells.
This invention relates to memory devices, specifically those using magnetic tunnel junction (MTJ) cells. The problem addressed is the efficient arrangement of bit lines in MTJ-based memory arrays to improve performance and reduce interference. In conventional designs, bit lines are often routed through the array, which can lead to increased parasitic capacitance, signal crosstalk, and complex routing challenges. The invention solves this by positioning the bit lines around the periphery of the MTJ cell array rather than within it. This peripheral arrangement minimizes the number of bit lines crossing the array, reducing signal interference and simplifying the overall layout. The MTJ cells are arranged in a grid, with each cell connected to a word line and a bit line. The peripheral bit lines are connected to the cells at the edges of the array, allowing for more efficient data read and write operations. This design also facilitates better thermal management and reduces the risk of data corruption due to electromagnetic interference. The invention is particularly useful in high-density memory applications where minimizing signal degradation and improving reliability are critical.
29. The memory device of claim 17 , wherein the annular structure comprises a conical structure including a conical non-magnetic layer disposed about a conical portion of the conductive layer, a conical free magnetic layer disposed about the conical non-magnetic layer, and a conical tunnel barrier layer disposed about the conical free magnetic layer.
This invention relates to a memory device incorporating a conical annular structure for improved magnetic storage. The device addresses challenges in conventional magnetic memory, such as data retention and scalability, by utilizing a conical geometry to enhance magnetic stability and read/write efficiency. The memory device includes a conductive layer with a conical portion, surrounded by a conical non-magnetic layer. A conical free magnetic layer is disposed about the non-magnetic layer, and a conical tunnel barrier layer is positioned around the free magnetic layer. This layered, conical structure enables precise magnetic switching and tunneling magnetoresistance effects, improving data storage reliability. The conical design optimizes magnetic domain alignment, reducing stray fields and increasing thermal stability. The tunnel barrier layer facilitates efficient electron tunneling between the free magnetic layer and an adjacent pinned magnetic layer, enhancing read operations. The overall structure allows for high-density memory integration while maintaining robust magnetic properties. This conical configuration is particularly useful in spin-transfer torque magnetic random-access memory (STT-MRAM) and other advanced magnetic storage technologies.
30. The device of claim 19 , further comprising: a third plurality of annular structures; a third planar reference magnetic layer disposed about the third plurality of annular structures and separated from the free magnetic layer of the third plurality of annular structures by the annular tunnel barrier layers of the third plurality of annular structures; a fifth non-magnetic insulator layer disposed about the third plurality of annular structures and between the fourth non-magnetic insulator layer and a first side of the third planar reference magnetic layer; a sixth non-magnetic insulator layer disposed about the third plurality of annular structures and on a second side of the third planar reference magnetic layer; and a third bit line coupled to the third planar reference magnetic layer.
This invention relates to magnetic memory devices, specifically to a multi-layered magnetic tunnel junction (MTJ) structure with improved read/write efficiency and scalability. The device addresses challenges in conventional MTJ designs, such as thermal stability, read disturbance, and integration density, by incorporating multiple annular (ring-shaped) magnetic structures with optimized magnetic coupling and electrical isolation. The device includes a third set of annular structures, each comprising a free magnetic layer, an annular tunnel barrier layer, and a reference magnetic layer. The third planar reference magnetic layer is positioned around these annular structures, separated by the tunnel barrier layers. Non-magnetic insulator layers (fifth and sixth) are placed around the annular structures, sandwiching the third planar reference magnetic layer to enhance electrical insulation and magnetic decoupling. A third bit line is connected to the third planar reference magnetic layer to facilitate electrical access for read/write operations. This configuration allows for independent control of magnetic states in the annular structures while maintaining stable reference magnetization, improving data retention and reducing interference between adjacent memory cells. The use of annular geometries and layered insulators enables higher packing density and better thermal management compared to traditional MTJ designs. The invention is particularly useful in high-density non-volatile memory applications, such as MRAM (magnetoresistive random-access memory), where reliability and scalability are critical.
31. The device of claim 18 , further comprising: a non-magnetic metal layer disposed between the second non-magnetic insulator layer and the third non-magnetic insulator layer and between the first plurality of annular structures and the second plurality of annular structures.
This invention relates to magnetic storage devices, specifically to a layered structure for improving data storage density and performance. The problem addressed is the need for enhanced magnetic stability and reduced interference between adjacent magnetic elements in high-density storage media. The device includes multiple layers of non-magnetic insulator materials and magnetic elements arranged in annular (ring-shaped) structures. The key innovation is the addition of a non-magnetic metal layer positioned between two non-magnetic insulator layers and between two sets of annular magnetic structures. This metal layer serves to electrically isolate the magnetic elements while maintaining magnetic coupling, thereby reducing parasitic capacitance and improving signal integrity. The annular structures are arranged in a way that allows for precise control of magnetic domains, which is critical for high-density data storage. The non-magnetic insulator layers provide electrical insulation and mechanical stability, while the metal layer ensures proper electrical isolation without disrupting magnetic interactions. This configuration enhances the device's ability to store and retrieve data reliably at higher densities. The overall structure is designed to minimize crosstalk and improve the efficiency of magnetic read/write operations.
32. The device of claim 18 , further comprising: an additional non-magnetic insulator layer disposed between the second non-magnetic insulator layer and the third non-magnetic insulator layer; and a non-magnetic metal plug disposed between respective ones of the annular conductive layer of the first plurality of annular structures and the annular conductive layer of the second plurality of annular structures.
This invention relates to magnetic memory devices, specifically spin-transfer torque magnetic random access memory (STT-MRAM), which faces challenges in achieving high-density, low-power, and reliable data storage. The device includes multiple annular (ring-shaped) magnetic structures stacked vertically, each with a magnetic free layer, a magnetic reference layer, and a non-magnetic spacer layer. These structures are separated by non-magnetic insulator layers to electrically isolate them while allowing magnetic coupling. The device further includes an additional non-magnetic insulator layer inserted between two of the existing insulator layers, enhancing electrical isolation and reducing parasitic leakage currents. Additionally, a non-magnetic metal plug is placed between the conductive layers of adjacent annular structures, improving electrical connectivity and ensuring efficient spin-transfer torque switching. The design optimizes magnetic coupling, minimizes power consumption, and enhances data retention stability, addressing key limitations in conventional STT-MRAM architectures. The additional insulator layer and metal plug work together to balance electrical isolation and conductivity, enabling higher-density memory cells with improved performance.
33. The device of claim 18 , further comprising: the plurality of annular structures arranged in columns and rows in the first and second planar reference magnetic layers; and a plurality of insulator regions disposed in the first and second planar reference magnetic layers between a respective pair of columns of the plurality of annular structures.
This invention relates to magnetic storage devices, specifically to a magnetic memory structure with improved data retention and read/write efficiency. The device includes a plurality of annular magnetic structures arranged in a grid pattern within first and second planar reference magnetic layers. These annular structures serve as storage elements, where data is encoded based on the magnetic orientation of each ring. The arrangement in columns and rows allows for dense packing of storage elements, increasing data capacity. To prevent interference between adjacent structures, insulator regions are placed between columns of annular structures within the planar reference layers. These insulator regions electrically isolate the columns while maintaining magnetic coupling where needed. The first and second planar reference layers provide a stable magnetic reference for read and write operations, ensuring reliable data integrity. The overall design enhances scalability and performance in magnetic memory applications by optimizing the spatial arrangement and electrical isolation of storage elements. This configuration is particularly useful in high-density memory arrays where minimizing crosstalk and maximizing storage density are critical.
34. The memory device of claim 22 , wherein the plurality of bit lines are peripherally disposed about the array of MTJ cells.
This invention relates to memory devices, specifically those using magnetic tunnel junction (MTJ) cells. The problem addressed is optimizing the layout and connectivity of bit lines in MTJ-based memory arrays to improve performance, density, and reliability. The memory device includes an array of MTJ cells, each with a storage layer and a reference layer, where the resistance state of the MTJ cell represents data. The device features a plurality of bit lines that are peripherally disposed about the array of MTJ cells. This peripheral arrangement means the bit lines are positioned around the outer edges of the array rather than running through the array itself. This layout reduces interference between bit lines and MTJ cells, minimizing parasitic effects and improving signal integrity. The peripheral bit lines also allow for more efficient routing and reduced footprint, enabling higher memory density. The MTJ cells are connected to word lines and select transistors, which control access to individual cells during read and write operations. The peripheral bit lines are electrically coupled to the MTJ cells, allowing data to be read from or written to the cells. The device may also include sense amplifiers and write drivers to facilitate these operations. The peripheral bit line arrangement helps reduce crosstalk and improves scalability, making the memory device suitable for high-density applications.
35. The device of claim 23 , further comprising: the plurality of annular structures including a third annular free magnetic layer disposed about the annular non-magnetic layer, the third annular free magnetic layer separated from the second annular free magnetic layer by a second non-magnetic separator layer; a third planar reference magnetic layer disposed about the plurality of annular structures and separated from the free magnetic layers of the plurality of annular structures by the annular tunnel barrier layers of the plurality of annular structures, and the third planar reference magnetic layer aligned with the third annular free magnetic layer; a fifth non-magnetic insulator layer disposed about the plurality of annular structures and between the fourth non-magnetic insulator layer and a first side of the third planar reference magnetic layer; a sixth non-magnetic insulator layer disposed about the plurality of annular structures and on a second side of the third planar reference magnetic layer; and a third bit line coupled to the third planar reference magnetic layer.
This invention relates to magnetic memory devices, specifically a multi-layered magnetic tunnel junction (MTJ) structure designed to enhance data storage density and performance. The device addresses challenges in conventional MTJ designs, such as limited scalability and inefficient magnetic coupling, by incorporating additional annular (ring-shaped) magnetic layers and reference layers to improve magnetic stability and read/write operations. The device includes a plurality of annular structures, each containing a non-magnetic layer surrounded by free magnetic layers. A third annular free magnetic layer is added, separated from a second annular free magnetic layer by a non-magnetic separator layer. This configuration allows for independent magnetic switching of multiple free layers within a single MTJ stack. A third planar reference magnetic layer is positioned around the annular structures, aligned with the third annular free magnetic layer, and separated from the free layers by tunnel barrier layers. This reference layer provides a stable magnetic reference for read operations. Non-magnetic insulator layers are placed around the annular structures, with a fifth insulator layer between a fourth insulator layer and one side of the third reference layer, and a sixth insulator layer on the opposite side. A third bit line is coupled to the third reference layer to facilitate electrical connections for data read/write operations. The design enables multi-bit storage per cell by leveraging multiple free magnetic layers, improving storage density and reliability in magnetic random-access memory (MRAM) applications.
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August 8, 2018
January 7, 2020
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