Patentable/Patents/US-10530169
US-10530169

Pulsed level shift and inverter circuits for GaN devices

PublishedJanuary 7, 2020
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

GaN-based half bridge power conversion circuits employ control, support and logic functions that are monolithically integrated on the same devices as the power transistors. In some embodiments a low side GaN device communicates through one or more level shift circuits with a high side GaN device. Various embodiments of level shift circuits and their inventive aspects are disclosed.

Patent Claims
6 claims

Legal claims defining the scope of protection. Each claim is shown in both the original legal language and a plain English translation.

Claim 1

Original Legal Text

1. A level shift circuit, comprising: a first inverter circuit comprising: a first input terminal, a first output terminal, a first GaN-based transistor having a gate coupled to the first input terminal, a drain coupled to the first output terminal, and a source coupled to a ground, and a first pull up device coupled between the drain of the first GaN-based transistor and a power supply; and a second inverter circuit comprising: a second input terminal, a second output terminal, a second GaN-based transistor having a gate coupled to the second input terminal, a drain coupled to the second output terminal, and a source coupled to the ground, and a second pull up device coupled between the drain of the second GaN-based transistor and the power supply, wherein the first pull up device comprises a third GaN-based transistor having a gate driven with a voltage based on the voltage at the second output terminal, and wherein the first, second, and third GaN-based transistors are of the same conductivity type.

Plain English Translation

A level shift circuit is designed to interface between different voltage domains, particularly in power electronics applications where gallium nitride (GaN) transistors are used. The circuit addresses the challenge of efficiently shifting voltage levels while maintaining compatibility with GaN-based devices, which are known for their high switching speeds and low on-resistance but require careful gate voltage control. The circuit includes two inverter stages, each comprising a GaN-based transistor and a pull-up device. The first inverter circuit has a GaN transistor with its gate connected to an input terminal, its drain to an output terminal, and its source to ground. A pull-up device, also a GaN transistor, is connected between the drain of the first GaN transistor and a power supply. The gate of this pull-up GaN transistor is driven by a voltage derived from the output of the second inverter circuit. The second inverter circuit is similarly structured, with its own GaN transistor and pull-up device. All GaN transistors in the circuit are of the same conductivity type, ensuring consistent performance. This configuration allows the circuit to shift voltage levels while leveraging the high-performance characteristics of GaN transistors, enabling efficient and reliable operation in high-frequency and high-power applications. The interconnection between the inverter stages ensures proper voltage level translation without additional complex circuitry.

Claim 2

Original Legal Text

2. The circuit of claim 1 , wherein the gate of the third GaN-based transistor is coupled to an output of an inverter circuit, and wherein an input of the inverter circuit is coupled to the second output terminal.

Plain English Translation

This invention relates to gallium nitride (GaN)-based transistor circuits, specifically addressing the need for improved switching and control in power electronics. The circuit includes a first GaN-based transistor with a gate coupled to a first output terminal and a second GaN-based transistor with a gate coupled to a second output terminal. The third GaN-based transistor is integrated into the circuit, with its gate connected to the output of an inverter circuit. The inverter circuit's input is coupled to the second output terminal, enabling controlled switching of the third transistor based on the signal from the second output. This configuration allows for precise timing and synchronization of transistor operations, improving efficiency and reliability in power conversion applications. The inverter circuit ensures that the third transistor's gate receives an inverted signal from the second output, facilitating complementary switching behavior. The overall design enhances performance by reducing switching losses and improving signal integrity in high-frequency power circuits. The use of GaN transistors provides high-speed switching capabilities and low on-resistance, making the circuit suitable for high-power and high-frequency applications.

Claim 3

Original Legal Text

3. The circuit of claim 2 , wherein the inverter circuit comprises an inverter, and the input of the inverter is coupled to the second output terminal by one or more additional GaN-based transistors.

Plain English Translation

This invention relates to power conversion circuits, specifically addressing efficiency and reliability challenges in high-voltage switching applications. The circuit includes a GaN-based transistor configured to handle high-voltage switching with low conduction losses. The inverter circuit, a key component, contains an inverter whose input is connected to a second output terminal through one or more additional GaN-based transistors. These additional transistors enhance the circuit's ability to manage high-voltage transitions while maintaining low switching losses, improving overall efficiency. The GaN-based transistors provide fast switching speeds and high breakdown voltages, making the circuit suitable for applications requiring compact, high-performance power conversion. The design ensures robust operation under varying load conditions by optimizing the transistor configurations to minimize parasitic effects and thermal stress. This approach addresses limitations in traditional silicon-based inverters, particularly in high-frequency and high-voltage applications where efficiency and reliability are critical. The circuit's architecture allows for scalable power handling while maintaining low energy dissipation, making it ideal for renewable energy systems, electric vehicle charging, and industrial power supplies.

Claim 4

Original Legal Text

4. The circuit of claim 1 , further comprising a second pull up device coupled between the drain of the first GaN-based transistor and the power supply.

Plain English Translation

This invention relates to power conversion circuits, specifically addressing efficiency and reliability challenges in high-voltage switching applications using gallium nitride (GaN) transistors. The circuit includes a first GaN-based transistor configured to switch a load current, with its drain connected to a power supply and its source connected to the load. The circuit further incorporates a second pull-up device connected between the drain of the first GaN-based transistor and the power supply. This additional pull-up device enhances the circuit's ability to handle high-voltage conditions, reducing voltage stress on the first GaN transistor during switching transitions. The pull-up device may be a diode, resistor, or another transistor, depending on the application. By mitigating voltage spikes and improving transient response, the circuit achieves higher efficiency and reliability in power conversion systems, particularly in applications requiring fast switching and high power density, such as DC-DC converters and motor drives. The design leverages GaN's superior switching characteristics while addressing its sensitivity to overvoltage conditions.

Claim 5

Original Legal Text

5. The circuit of claim 4 , wherein the second pull up device conducts current passively.

Plain English Translation

Technical Summary: This invention relates to integrated circuit design, specifically to a circuit configuration that includes a passive current-conducting pull-up device. The problem addressed is the need for efficient and reliable current conduction in pull-up circuits, particularly in scenarios where active control is not required or desirable. The circuit comprises a first pull-up device and a second pull-up device connected in parallel. The first pull-up device is actively controlled, meaning its conduction is regulated by a control signal. The second pull-up device, however, conducts current passively, meaning it operates without active control. This passive conduction can be achieved through a diode-connected transistor or a resistor, allowing current to flow when the circuit conditions permit without requiring an external control signal. The passive pull-up device ensures continuous current conduction when needed, reducing the need for active control and simplifying the circuit design. This configuration is particularly useful in applications where a steady current path is required, such as in voltage regulation, signal conditioning, or power management circuits. The combination of active and passive pull-up devices provides flexibility in circuit operation, allowing for both controlled and uncontrolled current paths as needed. The passive conduction in the second pull-up device ensures reliability and efficiency in current distribution within the circuit.

Claim 6

Original Legal Text

6. The circuit of claim 4 , further comprising a third pull up device coupled between the drain of the first GaN-based transistor and the power supply.

Plain English Translation

Technical Summary: This invention relates to power electronics, specifically to circuits incorporating gallium nitride (GaN)-based transistors for high-efficiency power conversion. The problem addressed is improving reliability and performance in GaN-based power circuits, particularly under fault conditions or during transient operations. The circuit includes a first GaN-based transistor configured as a switch, with its drain connected to a power supply. A second GaN-based transistor is coupled to the first transistor to provide current sensing or protection functionality. The invention further includes a third pull-up device connected between the drain of the first GaN-based transistor and the power supply. This third device enhances circuit robustness by ensuring proper voltage regulation and current path management, particularly during fault conditions or when the first transistor is in an off state. The pull-up device may be implemented as a resistor, diode, or additional transistor to stabilize voltage levels and prevent voltage spikes that could damage the circuit. This configuration improves fault tolerance and operational stability in GaN-based power conversion systems.

Classification Codes (CPC)

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Patent Metadata

Filing Date

October 4, 2018

Publication Date

January 7, 2020

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