A process for metalizing a through silicon via feature in a semiconductor integrated circuit device, the process including, during the filling cycle, reversing the polarity of circuit for an interval to generate an anodic potential at said metalizing substrate and desorb leveler from the copper surface within the via, followed by resuming copper deposition by re-establishing the surface of the copper within the via as the cathode in the circuit, thereby yielding a copper filled via feature.
Legal claims defining the scope of protection. Each claim is shown in both the original legal language and a plain English translation.
1. A process for metalizing a through silicon via feature in a semiconductor integrated circuit device, said device comprising a surface having a via feature therein, said via feature comprising a sidewall extending from said surface and a bottom, said sidewall, said bottom and said surface having a metalizing substrate thereon for deposition of copper, said metalizing substrate comprising a seed layer, the process comprising: immersing said metalizing substrate in an electrolytic copper deposition composition, wherein the through silicon via feature has an entry dimension between 1 micrometers and 25 micrometers, a depth dimension between 50 micrometers and 300 micrometers, and an aspect ratio greater than 2:1, said metalizing substrate providing a cathode for electrolytic deposition of copper thereon, the electrolytic deposition composition comprising: a source of copper ions; an acid component selected from among an inorganic acid, an organic sulfonic acid, and mixtures thereof; an accelerator; a suppressor; a leveler; and chloride ions; establishing an electrodeposition circuit comprising an anode, the electrolytic deposition composition, the cathode, and a power source; applying a potential between the anode and the cathode during a via filling cycle to establish an anodic polarity at the anode and a cathodic polarity at the cathode to generate an electrodeposition current and cause reduction of copper ions at the cathode to plate copper onto the metalizing substrate at the bottom and sidewall of the via, the via preferentially plating on the bottom and lower sidewall to cause filling of the via from the bottom with copper; reversing a polarity of said electrodeposition circuit during the via filling cycle for at least one interval to generate an anodic potential at said metalizing substrate; resuming copper deposition by re-establishing a surface of the copper plated within the via as the cathode in the circuit, thereby yielding a copper filled via feature; wherein a ratio of cumulative charge transfer in said circuit during copper deposition within said filling cycle to cumulative charge transfer during a sum of all anodic potential intervals is at least 80:1.
This invention relates to a process for metalizing through-silicon via (TSV) features in semiconductor integrated circuits, addressing challenges in filling high-aspect-ratio vias with copper. The process involves electrolytic deposition of copper onto a metalizing substrate, which includes a seed layer, within a via feature having an entry dimension of 1-25 micrometers, a depth of 50-300 micrometers, and an aspect ratio greater than 2:1. The electrolytic composition contains copper ions, an acid component (inorganic or organic sulfonic acid), chloride ions, and additives like an accelerator, suppressor, and leveler. During deposition, the via is preferentially plated from the bottom upward to ensure complete filling. The process includes reversing the electrodeposition circuit polarity at least once during the filling cycle to apply an anodic potential to the metalizing substrate, which helps control deposition uniformity. After polarity reversal, copper deposition resumes, with the plated copper surface acting as the cathode. The cumulative charge transfer ratio during copper deposition to anodic intervals is maintained at least 80:1 to ensure efficient via filling. This method improves copper filling in high-aspect-ratio TSVs, reducing defects and enhancing reliability in semiconductor devices.
2. A process as set forth in claim 1 wherein the polarity of the circuit is reversed to provide an anodic potential at said metalizing substrate in a plurality of intervals during said filling cycle.
This invention relates to an electrochemical deposition process for filling micro-vias or trenches in a substrate with metal, particularly in semiconductor or printed circuit board manufacturing. The process addresses the challenge of achieving uniform and void-free metal deposition in high-aspect-ratio features, which can be difficult due to uneven current distribution and depletion of metal ions near the substrate surface. The process involves immersing a metalizing substrate in an electrolyte solution containing metal ions and applying a cathodic potential to the substrate to initiate metal deposition. To enhance deposition uniformity, the polarity of the circuit is periodically reversed during the filling cycle, applying an anodic potential to the substrate in multiple intervals. This reversal disrupts the formation of surface irregularities, promotes ion replenishment near the substrate, and ensures consistent metal deposition across the feature. The reversal intervals are controlled to avoid excessive dissolution of the deposited metal while maintaining deposition efficiency. The process may also include pulse plating techniques, where current density is modulated to further refine the deposition profile. The invention improves fill quality, reduces defects, and increases yield in microelectronic fabrication.
3. A process as set forth in claim 1 wherein the ratio of cumulative charge transfer in the electrodeposition circuit during copper deposition within the via filling cycle to cumulative charge transfer during the sum of all said anodic potential intervals at said metalizing substrate is between 500:1 and 100,000:1, between 1,000:1 and 50,000:1, or between 3,000:1 and 30,000:1.
The invention relates to an electrodeposition process for filling vias in a substrate with copper, addressing challenges in achieving uniform and defect-free deposition. The process involves controlling the ratio of charge transfer during copper deposition to charge transfer during anodic potential intervals applied to the substrate. Specifically, the ratio of cumulative charge transfer during copper deposition within the via filling cycle to the cumulative charge transfer during all anodic potential intervals is maintained within defined ranges: between 500:1 and 100,000:1, between 1,000:1 and 50,000:1, or between 3,000:1 and 30,000:1. This control ensures efficient via filling while minimizing defects such as voids or overplating. The anodic potential intervals are applied to the substrate to regulate deposition uniformity and prevent excessive copper buildup. The process optimizes the balance between deposition and anodic treatment to enhance the quality and reliability of the filled vias.
4. A process as set forth in claim 2 wherein a cumulative extent of anodic charge transfer at said metalizing substrate in the sum of all said anodic potential intervals is less than an average of 1.8 coulombs/cm 2 integrated over the total electrodic surface area of the metalizing substrate.
This invention relates to an electrochemical process for metalizing a substrate, specifically addressing the challenge of controlling anodic charge transfer to prevent excessive oxidation or degradation of the substrate during electroplating. The process involves applying anodic potential intervals to the metalizing substrate while ensuring that the cumulative anodic charge transfer across all intervals remains below a specified threshold. The key innovation is limiting the total anodic charge transfer to less than 1.8 coulombs per square centimeter, averaged over the entire electrodic surface area of the substrate. This constraint helps maintain substrate integrity by minimizing unwanted oxidation or dissolution reactions. The process may involve alternating anodic and cathodic steps, where the anodic intervals are carefully controlled to avoid excessive charge accumulation. By regulating the anodic charge transfer, the method ensures efficient metal deposition while preserving the substrate's structural and functional properties. This approach is particularly useful in applications requiring precise control over electroplating conditions, such as in electronics manufacturing or corrosion-resistant coatings.
5. A process as set forth in claim 2 wherein a cumulative duration of all anodic potential intervals at said metalizing substrate during said filling cycle is not more than 50 seconds.
This invention relates to an electrochemical process for metalizing a substrate, specifically addressing the challenge of controlling anodic potential intervals during the filling cycle to optimize deposition efficiency and quality. The process involves applying anodic potential to a metalizing substrate during a filling cycle, where the cumulative duration of all anodic potential intervals does not exceed 50 seconds. This constraint ensures that the substrate remains in an anodic state for a limited time, preventing excessive oxidation or degradation while promoting uniform metal deposition. The process may include multiple anodic potential intervals, each contributing to the total duration, but the sum must stay within the specified limit. This controlled approach enhances the metalizing process by balancing anodic treatment with deposition efficiency, resulting in improved coating uniformity and adhesion. The invention is particularly useful in industries requiring precise metal deposition, such as electronics, automotive, and aerospace, where substrate integrity and coating quality are critical. By restricting the cumulative anodic potential duration, the process avoids over-oxidation while maintaining effective metal filling, leading to higher-quality finished products.
6. A process as set forth in claim 2 wherein at least one of said anodic potential intervals prevails for a period of at least 0.1 seconds.
This invention relates to an electrochemical process involving controlled anodic potential intervals to enhance material treatment or surface modification. The process addresses challenges in achieving precise electrochemical reactions, such as uniform coating deposition, corrosion resistance, or surface activation, by regulating the duration of anodic potential intervals. Specifically, the process ensures that at least one anodic potential interval lasts for a minimum of 0.1 seconds, which improves reaction consistency and efficiency. The method involves applying an anodic potential to an electrode in an electrolyte solution, where the potential is maintained for a defined duration to drive the desired electrochemical reaction. The process may include multiple anodic potential intervals, each with adjustable durations, to optimize the reaction conditions. The extended interval duration helps stabilize the electrochemical environment, reducing variability in reaction outcomes. This approach is particularly useful in industries requiring high-precision electrochemical treatments, such as semiconductor manufacturing, corrosion protection, or electrochemical sensing. The invention ensures better control over the electrochemical process, leading to improved material properties and performance.
7. A process as set forth in claim 2 wherein at least one of said anodic potential intervals prevails for a period of at least 0.5 seconds.
This invention relates to an electrochemical process for controlling anodic potential intervals in a system, likely for applications such as electroplating, corrosion protection, or surface treatment. The process addresses the challenge of optimizing electrode performance by precisely managing the duration of anodic potential intervals to enhance efficiency, uniformity, or material properties. The process involves applying an anodic potential to an electrode, where the potential is maintained for specific intervals. At least one of these intervals lasts for a minimum of 0.5 seconds, ensuring sufficient time for electrochemical reactions to occur. This duration may be critical for achieving desired outcomes, such as uniform coating deposition, reduced energy consumption, or improved surface quality. The process may also include other steps, such as adjusting the potential between anodic and cathodic states, cycling between different potentials, or modulating the duration of intervals based on real-time feedback. These steps help maintain optimal conditions for the electrochemical reactions, preventing issues like passivation, uneven deposition, or excessive energy use. By controlling the anodic potential intervals with a minimum duration of 0.5 seconds, the process ensures consistent and predictable electrochemical behavior, improving the reliability and performance of the system. This approach is particularly useful in industrial applications where precise control over electrochemical processes is essential.
8. A process as set forth in claim 2 wherein at least one of said anodic potential intervals prevails for a period between 0.1 and 100 seconds.
The invention relates to an electrochemical process for controlling anodic potential intervals in a system, likely for applications such as electroplating, corrosion protection, or surface treatment. The process addresses the challenge of optimizing electrode performance by precisely regulating the duration of anodic potential intervals to enhance efficiency, uniformity, or material properties. The process involves applying an anodic potential to an electrode, where the potential is maintained for a specific duration within a defined range. At least one of these anodic potential intervals lasts between 0.1 and 100 seconds, allowing for fine-tuned control over electrochemical reactions. This interval duration is critical for achieving desired outcomes, such as uniform coating deposition, reduced energy consumption, or improved surface quality. The process may include multiple anodic potential intervals, each with adjustable durations, to tailor the electrochemical treatment to specific requirements. The intervals can be part of a cyclic or pulsed electrochemical process, where alternating anodic and cathodic potentials are applied to an electrode. The controlled duration of the anodic intervals ensures consistent and reproducible results, addressing issues like uneven deposition or excessive material consumption. By regulating the anodic potential intervals within the specified range, the process improves the precision and effectiveness of electrochemical treatments, making it suitable for industrial applications requiring high-quality surface modifications.
9. A process as set forth in claim 2 in which each of at least two of said anodic potential intervals prevails for a period of at least 0.1 second.
This invention relates to an electrochemical process for controlling anodic potential intervals in a system, addressing the need for precise and stable anodic potential regulation to improve efficiency and performance in electrochemical reactions. The process involves applying a sequence of anodic potential intervals to an electrode, where each interval is maintained for a minimum duration of at least 0.1 second. The process includes a method for generating an anodic potential waveform, which involves applying a series of anodic potential intervals to an electrode, where each interval is separated by a transition period. The waveform is designed to optimize electrochemical reactions by ensuring that each anodic potential interval is sustained long enough to achieve the desired electrochemical effect. The process may be used in applications such as electroplating, corrosion protection, or energy storage, where precise control of anodic potential is critical for performance. The invention ensures that the anodic potential is maintained for sufficient time to achieve consistent and repeatable results, improving the overall efficiency and reliability of the electrochemical system.
10. A process as set forth in claim 2 wherein at least one of said anodic potential intervals prevails to an extent of an average charge transfer of at least 5×10 −5 coulombs/cm 2 integrated over a total electrodic area of said metalizing substrate.
This invention relates to an electrochemical process for metalizing a substrate, specifically addressing the challenge of achieving uniform and efficient metal deposition. The process involves applying anodic potential intervals to the substrate during electroplating to control the deposition rate and quality. A key aspect is that at least one of these anodic potential intervals must result in an average charge transfer of at least 5×10^-5 coulombs per square centimeter, integrated over the total electrodic area of the substrate. This ensures sufficient charge transfer to promote uniform metal deposition and adhesion. The process may also include cathodic potential intervals to balance the deposition and prevent defects. The controlled application of anodic and cathodic potentials optimizes the metalizing process, improving coating uniformity and reducing waste. The invention is particularly useful in industries requiring precise metal coatings, such as electronics and automotive manufacturing.
11. A process as set forth in claim 1 wherein said filling cycle comprises a plurality of anodic potential intervals of material duration, wherein of the plurality of anodic potential intervals of material duration extends for a period of at least 0.6 seconds, the period of cathodic current at said metalizing substrate between successive anodic potential intervals of material duration being at least 0.5 minutes.
This invention relates to an electrochemical process for metalizing a substrate, specifically addressing the challenge of achieving uniform and high-quality metal deposition. The process involves a filling cycle that includes multiple anodic potential intervals, each lasting at least 0.6 seconds, with a cathodic current period of at least 0.5 minutes between successive anodic intervals. The anodic potential intervals are of "material duration," meaning they significantly influence the deposition process. The cathodic current between intervals helps control the deposition rate and uniformity, preventing defects such as pitting or uneven coating. The process is designed to enhance adhesion, reduce porosity, and improve the overall quality of the metalized substrate. The extended anodic and cathodic intervals ensure proper material interaction, leading to a more stable and durable coating. This method is particularly useful in industries requiring precise and reliable metal deposition, such as electronics, automotive, and aerospace manufacturing.
12. A process as set forth in claim 1 wherein said filling cycle comprises a plurality of faradaically material anodic potential intervals at said metalizing substrate in each of which an average anodic charge transfer is at least 5×10 −5 coulombs/cm 2 integrated over a total electrodic area of said metalizing substrate, and wherein, between successive faradaically material anodic potential intervals, an integrated average cathodic current charge transfer over a total surface area of said cathode is at least 1.5×10 −2 coulombs/cm 2 .
This invention relates to an electrochemical process for metalizing a substrate, addressing challenges in achieving uniform and efficient metal deposition. The process involves a filling cycle with multiple anodic potential intervals applied to the metalizing substrate, where each interval results in an average anodic charge transfer of at least 5×10⁻⁵ coulombs per square centimeter, integrated over the entire substrate area. Between these anodic intervals, a cathodic current is applied to the cathode, ensuring an integrated average cathodic charge transfer of at least 1.5×10⁻² coulombs per square centimeter over the cathode's total surface area. This alternating anodic and cathodic sequence enhances deposition uniformity and efficiency by controlling charge distribution and minimizing defects. The process is particularly useful in applications requiring precise metal layer formation, such as electronics manufacturing or corrosion-resistant coatings. The invention improves upon conventional methods by optimizing charge transfer dynamics to achieve superior material properties and process consistency.
13. A process as set forth in claim 11 wherein, during each said anodic potential interval of material duration, a current density across an electrode surface of the metalizing substrate is maintained at an average of between 0.1 and 100 mA/cm 2 integrated over a total electrodic area of said metalizing substrate.
This invention relates to an electrochemical process for metalizing a substrate, specifically addressing the challenge of achieving uniform and controlled metal deposition on a substrate surface. The process involves applying an anodic potential to the substrate in intervals of material duration, where the current density across the electrode surface of the metalizing substrate is carefully regulated. During each anodic potential interval, the current density is maintained at an average between 0.1 and 100 mA/cm², integrated over the total electrodic area of the substrate. This controlled current density ensures consistent metal deposition, preventing defects such as uneven coating or excessive material buildup. The process may include multiple anodic potential intervals, each with precise current density control, to optimize the metalizing efficiency and quality. The invention is particularly useful in industries requiring high-precision metal coatings, such as electronics, aerospace, and automotive manufacturing, where uniform and durable metal layers are critical. By maintaining the specified current density range, the process enhances the adhesion, conductivity, and corrosion resistance of the deposited metal layer.
14. A process as set forth in claim 13 wherein during each of the plurality of anodic potential interval of material duration and during each said faradaically material anodic potential interval, the current density across the electrode surface of the metalizing substrate is maintained at an average of between 0.1 and 10 mA/cm 2 integrated over the total electrodic area of said metalizing substrate.
This invention relates to an electrochemical process for metalizing a substrate, specifically controlling current density during anodic potential intervals to improve deposition quality. The process addresses inconsistencies in metal deposition caused by uneven current distribution across the substrate surface, which can lead to defects such as pitting, uneven thickness, or poor adhesion. The solution involves maintaining a precise average current density between 0.1 and 10 mA/cm² across the entire electrode surface of the metalizing substrate during both anodic potential intervals and faradaically significant anodic potential intervals. This ensures uniform metal deposition by preventing localized over- or under-deposition. The process is part of a broader method that includes multiple anodic potential intervals of varying durations, where each interval contributes to the controlled buildup of the metal layer. By regulating current density within this specified range, the invention achieves consistent metal deposition, enhancing the structural integrity and performance of the final coated substrate. This is particularly useful in industries requiring high-precision metal coatings, such as electronics, aerospace, and corrosion-resistant applications.
15. A process as set forth in claim 1 wherein the via is at least 90% filled after a filling cycle of no greater than 90 minutes.
The invention relates to a semiconductor manufacturing process for filling vias in a substrate with conductive material. The process addresses the challenge of efficiently and reliably filling high-aspect-ratio vias, which are narrow, deep openings in semiconductor substrates that must be filled with conductive material to form electrical connections. Incomplete or void-filled via filling can lead to electrical failures, while excessively long filling times reduce manufacturing throughput. The process involves depositing a conductive material, such as copper, into the vias using an electrochemical deposition method. The deposition is controlled to ensure that the vias are at least 90% filled within a single filling cycle lasting no more than 90 minutes. This is achieved by optimizing deposition parameters, such as current density, electrolyte composition, and temperature, to promote uniform and rapid filling without void formation. The process may also include pre-treatment steps, such as surface cleaning or seed layer deposition, to enhance adhesion and nucleation of the conductive material. The method ensures high-quality via filling with minimal defects, improving device reliability and manufacturing efficiency.
16. A process as set forth in claim 1 wherein the copper filled via is at least one of substantially free of seams and voids or substantially free of mounds and protrusions.
This invention relates to a process for forming copper-filled vias in semiconductor manufacturing, addressing defects such as seams, voids, mounds, and protrusions that can degrade electrical performance and reliability. The process involves depositing copper into vias to create conductive pathways between layers of a semiconductor device. The key improvement is ensuring the copper-filled vias are either substantially free of seams and voids or substantially free of mounds and protrusions, which can disrupt signal integrity and mechanical stability. Seams and voids are gaps or discontinuities within the copper fill, while mounds and protrusions are excess material on the via surface. The process may include steps such as via formation, barrier layer deposition, seed layer application, and copper electroplating or electroless deposition, followed by planarization to remove excess material. The resulting vias have improved electrical conductivity and mechanical robustness, enhancing device performance and yield. This solution is particularly relevant in advanced semiconductor fabrication where high-density interconnects require defect-free copper fills to meet stringent reliability standards.
17. A process as set forth in claim 2 wherein each of said anodic potential intervals is effective to desorb leveler from an electrodic surface, whereby an average current density integrated over a total electrodic area of the metalizing substrate is increased upon resumption of cathodic current relative to the current density prior to said anodic potential interval.
This invention relates to an electrochemical process for metalizing substrates, specifically addressing the challenge of maintaining consistent current density during electrodeposition. The process involves applying anodic potential intervals to an electrodic surface to desorb leveler compounds, which are additives used to control deposition uniformity but can reduce current efficiency. By periodically applying these anodic pulses, the leveler is temporarily removed from the surface, allowing for higher cathodic current density when deposition resumes. This increases the average current density integrated over the total electrodic area of the substrate compared to the density before the anodic interval. The method ensures more efficient metal deposition by dynamically managing leveler adsorption and desorption, improving overall plating performance. The process is particularly useful in industrial electroplating applications where uniform and efficient metal deposition is critical.
18. A process as set forth in claim 17 wherein said anodic potential intervals are effective to desorb suppressor from the surface of the copper plated within the via.
The invention relates to an electrochemical process for copper plating, specifically addressing the challenge of removing suppressor molecules from the surface of copper deposited within vias during the plating process. Suppressor molecules are commonly used in copper plating baths to control deposition rates and uniformity, but their presence on the copper surface can interfere with subsequent processing steps. The process involves applying anodic potential intervals to the copper-plated via to desorb the suppressor molecules from the copper surface. The anodic potential intervals are carefully controlled to ensure effective desorption without damaging the copper plating or the underlying substrate. This step is integrated into a broader copper plating process that includes deposition of copper within the via, followed by the application of the anodic potential to remove the suppressor. The process is particularly useful in semiconductor manufacturing, where precise control of copper surface properties is critical for reliable interconnect formation. By removing the suppressor, the process improves the adhesion and conductivity of the copper plating, enhancing the performance and reliability of the final electronic device.
19. A process as set forth in claim 1 wherein: the polarity of the circuit is reversed to provide an anodic potential at said metalizing substrate in a plurality of intervals during said filling cycle; and a cumulative duration of all anodic potential intervals at said metalizing substrate during said filling cycle is not more than 50 seconds; at least one of said anodic potential intervals prevails for a period of at least 0.5 seconds and each of at least two of said anodic potential intervals prevails for a period of at least 0.1 second.
This invention relates to an electrochemical process for filling micro-vias or through-holes in a substrate with a metal, such as copper, using a plating technique. The process addresses the challenge of achieving uniform and defect-free metal deposition in small, high-aspect-ratio features, which can be difficult due to uneven current distribution and void formation. The process involves reversing the polarity of the plating circuit during the filling cycle to apply an anodic potential to the metalizing substrate. This reversal occurs in multiple intervals, with the total time spent at anodic potential not exceeding 50 seconds. At least one of these intervals lasts at least 0.5 seconds, and at least two intervals each last at least 0.1 seconds. The anodic potential helps to dissolve excess metal deposits, reduce voids, and improve filling uniformity. The controlled duration of these intervals ensures efficient deposition while preventing over-etching or excessive material removal. The method is particularly useful in semiconductor and printed circuit board manufacturing, where precise metal filling is critical for performance and reliability.
20. A process as set forth in claim 19 wherein said filling cycle comprises a plurality of anodic potential intervals of material duration, wherein each of the plurality of anodic potential intervals of material duration extends for a period of at least 0.6 seconds, a period of cathodic current at said metalizing substrate between successive anodic potential intervals of material duration being at least 0.5 minutes.
This invention relates to an electrochemical process for metalizing a substrate, addressing challenges in achieving uniform and high-quality metal coatings. The process involves alternating anodic and cathodic phases to control deposition while minimizing defects. The filling cycle includes multiple anodic potential intervals, each lasting at least 0.6 seconds, with a cathodic current phase of at least 0.5 minutes between successive anodic intervals. This sequence ensures proper material deposition and adhesion. The process may also include pre-treatment steps like substrate cleaning and surface activation, as well as post-treatment steps such as rinsing or drying. The method is particularly useful for industrial applications requiring precise and durable metal coatings, such as in electronics, automotive, or aerospace industries. The controlled timing of anodic and cathodic phases helps prevent over-deposition or uneven coating, improving product quality and consistency.
21. A process as set forth in claim 19 wherein said filling cycle comprises a plurality of faradaically material anodic potential intervals at said metalizing substrate in each of which an average anodic charge transfer is at least 5×10 −5 coulombs/cm 2 integrated over a total electrodic surface area of said metalizing substrate, and wherein, between successive faradaically material anodic potential intervals, an integrated average cathodic current charge transfer over the total electrodic surface area of said cathode is at least 1.5×10 −2 coulombs/cm 2 .
This invention relates to an electrochemical process for metalizing a substrate, addressing challenges in achieving uniform and high-quality metal deposition. The process involves a filling cycle with multiple anodic potential intervals applied to the metalizing substrate, where each interval results in an average anodic charge transfer of at least 5×10^-5 coulombs per square centimeter, integrated over the entire surface area of the substrate. Between these anodic intervals, a cathodic current is applied to the cathode, with an integrated average cathodic charge transfer of at least 1.5×10^-2 coulombs per square centimeter over the same surface area. This alternating sequence of anodic and cathodic charge transfers enhances deposition uniformity and efficiency by controlling the electrochemical reactions at the substrate surface. The process is particularly useful in applications requiring precise and consistent metal layer formation, such as in semiconductor manufacturing or advanced materials fabrication. The invention improves upon conventional methods by optimizing charge transfer dynamics to minimize defects and improve coating quality.
22. A process for metalizing a through silicon via feature in a semiconductor integrated circuit device, said device comprising a surface having a via feature therein, said via feature comprising a sidewall extending from said surface and a bottom, said sidewall, said bottom and said surface having a metalizing substrate thereon for deposition of copper, said metalizing substrate comprising a seed layer, the process comprising: immersing said metalizing substrate in an electrolytic copper deposition composition, wherein the through silicon via feature has an entry dimension between 1 micrometers and 25 micrometers, a depth dimension between 50 micrometers and 300 micrometers, and an aspect ratio greater than 2:1, said metalizing substrate providing a cathode for electrolytic deposition of copper thereon, the deposition composition comprising: a source of copper ions; an acid component selected from among an inorganic acid, an organic sulfonic acid, and mixtures thereof; an accelerator; a suppressor; a leveler; and chloride ions; establishing an electrodeposition circuit comprising an anode, the electrolytic deposition composition, the cathode, and a power source; applying a potential between the anode and the cathode during a via filling cycle to establish a positive polarity at the anode and a negative polarity at the cathode to generate an electrodeposition current and cause reduction of copper ions at the cathode to plate copper onto the metalizing substrate at the bottom and sidewall of the via, the via preferentially plating on the bottom and lower sidewall to cause filling of the via from the bottom with copper; reversing a polarity of said electrodeposition circuit during the via filling cycle for at least one interval to generate an anodic potential at said metalizing substrate; resuming copper deposition by re-establishing a surface of the copper plated within the via as the cathode in the circuit, thereby yielding a copper filled via feature; wherein the via filling cycle comprises a plurality of faradaically material anodic potential intervals in each of which an average anodic charge transfer is at least 3×10 −4 coulombs/cm 2 integrated over a total electrodic surface area of said metalizing substrate, and wherein between successive faradaically material anodic potential intervals, an integrated average cathodic current charge transfer over the total electrodic surface area of said metalizing substrate is at least 1.5×10 −2 coulombs/cm 2 .
The process involves metalizing through-silicon via (TSV) features in semiconductor integrated circuits, addressing challenges in filling high-aspect-ratio vias with copper. The TSV features have entry dimensions between 1 and 25 micrometers, depths between 50 and 300 micrometers, and aspect ratios greater than 2:1. The process begins with a metalizing substrate, including a seed layer, deposited on the via sidewalls, bottom, and surface. The substrate acts as a cathode in an electrolytic copper deposition system. The deposition composition contains copper ions, an acid component (inorganic or organic sulfonic acid), an accelerator, a suppressor, a leveler, and chloride ions. During electrodeposition, copper is preferentially plated at the via bottom and lower sidewall, filling the via from the bottom upward. The process includes reversing the electrodeposition circuit polarity during the filling cycle, applying an anodic potential to the metalizing substrate for at least one interval. This step disrupts copper deposition, followed by resuming cathodic deposition to continue filling. The via filling cycle includes multiple anodic potential intervals, each with an average anodic charge transfer of at least 3×10^-4 coulombs/cm² over the total substrate surface area. Between these intervals, the cathodic current charge transfer is at least 1.5×10^-2 coulombs/cm². This controlled polarity reversal ensures uniform copper filling, preventing voids or overplating in high-aspect-ratio vias.
23. A process for metalizing a through silicon via feature in a semiconductor integrated circuit device, said device comprising a surface having a via feature therein, said via feature comprising a sidewall extending from said surface, and a bottom, said sidewall, said bottom and said surface having a metalizing substrate thereon for deposition of copper, said metalizing substrate comprising a seed layer, the process comprising: immersing said metalizing substrate with an electrolytic copper deposition composition, wherein the through silicon via feature has an entry dimension between 1 micrometers and 25 micrometers, a depth dimension between 50 micrometers and 300 micrometers, and an aspect ratio greater than 2:1, said metalizing substrate providing a cathode for electrolytic deposition of copper thereon, the deposition composition comprising: a source of copper ions; an acid component selected from among an inorganic acid, an organic sulfonic acid, and mixtures thereof; an accelerator; a suppressor; a leveler; and chloride ions; establishing an electrodeposition circuit comprising an anode, the electrolytic deposition composition, the cathode, and a power source; applying a potential between the anode and the cathode during a via filling cycle to establish a positive polarity at the anode and a negative polarity at the cathode to generate an electrodeposition current and cause reduction of copper ions at the cathode to plate copper onto the metalizing substrate at the bottom and sidewall of the via, the via preferentially plating on the bottom and lower sidewall to cause filling of the via from the bottom with copper; reversing a polarity of said electrodeposition circuit during the via filling cycle for at least one interval to generate an anodic potential at said metalizing substrate; resuming copper deposition by re-establishing a surface of the copper plated within the via as the cathode in the circuit, thereby yielding a copper filled via feature; the method further comprising: reversing the polarity of the circuit to provide an anodic potential at said metalizing substrate in a plurality of intervals during the filling cycle; wherein a ratio of cumulative charge transfer in said circuit during copper deposition within said filling cycle to cumulative charge transfer during the sum of all intervals of anodic potential at said metalizing substrate is at least 50:1; wherein said filling cycle comprises a plurality of anodic potential intervals of material duration, and each of said anodic intervals of material duration extends for a period of at least 0.6 seconds, a period of cathodic current at said metalizing substrate between successive anodic potential intervals of material duration being at least 0.5 minutes; wherein a cumulative duration of all anodic potential intervals at said metalizing substrate during said filling cycle is not more than 50 seconds; wherein a cumulative extent of anodic charge transfer at said metalizing substrate in the sum of all said anodic potential intervals is not greater than an average of 1.8 coulombs/cm 2 integrated over the total electrodic surface area of said metalizing substrate; wherein during each said anodic potential interval of material duration, a current density across an electrode surface of the metalizing substrate is maintained at an average of between 0.1 and 100 mA/cm 2 integrated over a total electrodic surface area of said metalizing substrate; wherein each of said anodic potential intervals is effective to desorb leveler from the electrodic surface, whereby the average current density integrated over the total electrodic surface area of said metalizing substrate is increased upon resumption of cathodic current relative to a current density prior to said anodic potential interval; wherein said anodic potential intervals are effective to desorb suppressor from the surface of the copper within the via; wherein a ratio of cumulative duration of cathodic current during copper deposition within said filling cycle to cumulative duration of all anodic potential intervals at said metalizing substrate is at least 80:1; and wherein the copper filled via is at least one of substantially free of seams and voids or substantially free of mounds and protrusions.
The process involves metalizing through-silicon via (TSV) features in semiconductor integrated circuits, addressing challenges in filling high-aspect-ratio vias with copper. The vias have entry dimensions between 1 and 25 micrometers, depths between 50 and 300 micrometers, and aspect ratios greater than 2:1. The process uses an electrolytic copper deposition composition containing copper ions, an acid component (inorganic or organic sulfonic acid), an accelerator, a suppressor, a leveler, and chloride ions. The metalizing substrate, which includes a seed layer, acts as a cathode in an electrodeposition circuit with an anode and a power source. During the filling cycle, copper is preferentially deposited at the via bottom and lower sidewall to ensure bottom-up filling. The process includes multiple polarity reversals to apply anodic potential to the metalizing substrate, desorbing leveler and suppressor from the copper surface. This increases current density upon resuming cathodic deposition, enhancing uniformity. Anodic intervals last at least 0.6 seconds, with at least 0.5 minutes of cathodic current between them. The cumulative anodic duration does not exceed 50 seconds, and the anodic charge transfer is limited to 1.8 coulombs/cm². The ratio of cathodic to anodic charge transfer is at least 50:1, and the ratio of cathodic to anodic duration is at least 80:1. The result is a copper-filled via substantially free of seams, voids, mounds, or protrusions.
24. A process as set forth in claim 23 wherein the ratio of cumulative charge transfer in said circuit during copper deposition within said filling cycle to the cumulative charge transfer during the sum of all intervals of anodic potential at said metalizing substrate is between 500:1 and 100,000:1.
This invention relates to an electrochemical process for copper deposition, specifically addressing the challenge of achieving uniform and defect-free copper filling in microelectronic structures, such as trenches or vias, during semiconductor manufacturing. The process involves controlling the ratio of charge transfer during copper deposition to the charge transfer during anodic intervals to optimize deposition efficiency and minimize defects. The process includes a filling cycle where copper is deposited onto a metallizing substrate, followed by anodic intervals where the substrate is subjected to anodic potential to remove excess copper or impurities. The key innovation lies in maintaining a specific ratio of cumulative charge transfer during copper deposition to the cumulative charge transfer during all anodic intervals. This ratio is controlled to be between 500:1 and 100,000:1, ensuring that the deposition process is highly efficient while preventing overplating or void formation. By precisely regulating this ratio, the process achieves uniform copper filling with minimal waste and defects, improving the reliability and performance of microelectronic devices. The method is particularly useful in advanced semiconductor fabrication where precise control of deposition parameters is critical.
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January 26, 2012
January 21, 2020
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