A novel semiconductor device, a semiconductor device with low power consumption, a semiconductor device capable of displaying a high-quality image, or a semiconductor device with a small area is provided. The semiconductor device includes an image processing portion and a driver circuit. The image processing portion includes a processor and a correction circuit. The correction circuit includes a PLD. The correction circuit is capable of correcting data input from the processor using the PLD. The processor is capable of outputting data corrected by the correction circuit to the driver circuit as a video signal. The PLD is capable of executing first gamma correction by input of first configuration data. The PLD is capable of executing second gamma correction by input of second configuration data. The content of the first gamma correction is different from that of the second gamma correction.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A semiconductor device comprising: an image processing portion comprising a correction circuit, wherein the correction circuit comprises a programmable logic device, wherein the programmable logic device is configured to be reconfigured so as to be capable of executing first gamma correction by input of first configuration data, wherein the programmable logic device is configured to be reconfigured so as to be capable of executing second gamma correction by input of second configuration data, wherein the first gamma correction is performed by a first method and the second gamma correction is performed by a second method, wherein the first method is table approximation, and wherein the second method is polygonal line approximation.
2. The semiconductor device according to claim 1 , wherein the programmable logic device comprises a first context and a second context, wherein the first context is capable of configuring a circuit configured to execute the first gamma correction, and wherein the second context is capable of configuring a circuit configured to execute the second gamma correction.
3. The semiconductor device according to claim 1 , wherein the correction circuit comprises a memory device and a switch circuit, and wherein the memory device comprises a transistor comprising a metal oxide in a channel formation region.
4. The semiconductor device according to claim 1 , wherein the programmable logic device comprises a configuration memory, and wherein the configuration memory comprises a transistor comprising a metal oxide in a channel formation region.
5. A semiconductor device comprising: an image processing portion; and a driver circuit, wherein the image processing portion comprises a processor and a correction circuit, wherein the correction circuit comprises a programmable logic device, wherein the correction circuit is capable of correcting data input from the processor using the programmable logic device, wherein the processor is capable of outputting data corrected by the correction circuit to the driver circuit as a video signal, wherein the programmable logic device is configured to be reconfigured so as to be capable of executing first gamma correction by input of first configuration data, wherein the programmable logic device is configured to be reconfigured so as to be capable of executing second gamma correction by input of second configuration data, wherein the first gamma correction is performed by a first method and the second gamma correction is performed by a second method, wherein the first method is table approximation, and wherein the second method is polygonal line approximation.
6. The semiconductor device according to claim 5 , wherein the programmable logic device comprises a first context and a second context, wherein the first context is capable of configuring a circuit configured to execute the first gamma correction, and wherein the second context is capable of configuring a circuit configured to execute the second gamma correction.
7. The semiconductor device according to claim 5 , wherein the programmable logic device comprises a configuration memory, and wherein the configuration memory comprises a transistor comprising a metal oxide in a channel formation region.
8. The semiconductor device according to claim 5 , wherein the correction circuit comprises a memory device and a switch circuit, wherein the memory device is capable of storing a look-up table used for the first gamma correction, wherein the switch circuit is capable of stopping power supply to the memory device in a period during which the second gamma correction is executed, and wherein the memory device comprises a transistor comprising a metal oxide in a channel formation region.
9. A display device comprising a display portion and the semiconductor device according to claim 5 , wherein the display portion comprises a first pixel group comprising a plurality of first pixels and a second pixel group comprising a plurality of second pixels, wherein the plurality of first pixels each comprise a light-emitting element, wherein the plurality of second pixels each comprise a reflective liquid crystal element, wherein the driver circuit is configured to supply a video signal subjected to the first gamma correction using table approximation to the first pixel group, and wherein the driver circuit is configured to supply a video signal subjected to the second gamma correction using polygonal line approximation to the second pixel group.
10. A display device comprising a display portion and the semiconductor device according to claim 5 .
11. A display system comprising: a control portion comprising an image processing portion and a driver circuit; and a display portion, wherein the image processing portion comprises a processor and a correction circuit, wherein the correction circuit comprises a programmable logic device, wherein the correction circuit is capable of correcting data input from the processor using the programmable logic device, wherein the processor is capable of outputting data corrected by the correction circuit to the driver circuit as a video signal, wherein the programmable logic device is configured to be reconfigured so as to be capable of executing first gamma correction by input of first configuration data, wherein the programmable logic device is configured to be reconfigured so as to be capable of executing second gamma correction by input of second configuration data, wherein the first gamma correction is performed by a first method and the second gamma correction is performed by a second method, wherein the first method is table approximation, wherein the second method is polygonal line approximation, wherein the control portion is capable of generating the video signal using image data input to the control portion, and wherein the display portion is capable of performing display using the video signal generated in the control portion.
12. The display system according to claim 11 , wherein the programmable logic device comprises a first context and a second context, wherein the first context is capable of configuring a circuit configured to execute the first gamma correction, and wherein the second context is capable of configuring a circuit configured to execute the second gamma correction.
13. The display system according to claim 11 , wherein the correction circuit comprises a memory device and a switch circuit, wherein the memory device is capable of storing a look-up table used for the first gamma correction, wherein the switch circuit is capable of stopping power supply to the memory device in a period during which the second gamma correction is executed, and wherein the memory device comprises a transistor comprising a metal oxide in a channel formation region.
14. The display system according to claim 11 , wherein the display portion comprises a first pixel group comprising a plurality of first pixels and a second pixel group comprising a plurality of second pixels, wherein the plurality of first pixels each comprise a light-emitting element, wherein the plurality of second pixels each comprise a reflective liquid crystal element, wherein a video signal subjected to the first gamma correction using table approximation is supplied to the first pixel group, and wherein a video signal subjected to the second gamma correction using polygonal line approximation is supplied to the second pixel group.
15. The display system according to claim 11 , wherein the programmable logic device comprises a configuration memory, and wherein the configuration memory comprises a transistor comprising a metal oxide in a channel formation region.
16. An electronic device comprising the display system according to claim 11 , wherein a character, a figure, or an image is identified using a touch sensor provided in the display portion.
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July 19, 2017
February 11, 2020
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