Display panel and display wall

1. A display panel, comprising: a substrate, having an edge: a plurality of pixels, disposed on the substrate, wherein the pixels comprise a plurality of first row pixels, a plurality of second row pixels, and a plurality of third row pixels disposed side by side, and a first distance between the first row pixels and the edge, a second distance between the second row pixels and the edge, and a third distance between the third row pixels and the edge are in a descending order: and a black matrix, disposed between the pixels, wherein the black matrix comprises a first sub-portion, a second sub-portion, and a third sub-portion disposed side by side, the first row pixels are disposed at one side of the first sub-portion, the second row pixels are disposed at one side of the second sub-portion, the third row pixels are disposed at one side of the third sub-portion, a fourth distance exists between the third sub-portion and the edge, a fifth distance exists between the second sub-portion and the edge, and a sixth distance exists between the first sub-portion and the edge, and the sixth distance, the fifth distance and the fourth distance are in a descending order, wherein the first sub-portion has a first width, the second sub-portion has a second width, and the third sub-portion has a third width, and the first width, the second width, and the third width are in an ascending order; the first row pixels have a fourth width, the second row pixels have a fifth width, the third row pixels have a sixth width, and the fourth width, the fifth width, and the sixth width are in an ascending order; wherein the third row pixels are pixels nearest the edge among the first row pixels, the second row pixels, and the third row pixels and aperture ratios of the first row pixels, the second row pixels, and the third row pixels are the same; and an integrated circuit disposed on the substrate, and disposed below the first sub portion, the second sub-portion and the third sub-portion, wherein the integrated circuit is electrically connected to at least one of the pixels.

2. The display panel according to claim 1 , wherein the integrated circuit is a gate driver or a data driver, the gate driver is configured to provide pulses for the pixels to enable and update the pixels, and the data driver is configured to provide, when the pixels are updated, pixel data corresponding to the pixels.

3. The display panel according to claim 1 , wherein a sum of the first width and the fourth width, a sum of the second width and the fifth width, and a sum of the third width and the sixth width are in an ascending order.

4. A display panel, comprising: a substrate, having an edge; and a plurality of pixels, disposed on the substrate, wherein the pixels comprise a plurality of first pixels, a plurality of second pixels, and a plurality of third pixels, the first pixels and the second pixels are adjacent, the second pixels and the third pixels are adjacent, a first distance exists between the first pixels and the edge, a second distance exists between the second pixels and the edge, a third distance exists between the third pixels and the edge, the first distance, the second distance, and the third distance are in a descending order: and a black matrix, disposed between the pixels, wherein the black matrix comprises a first portion, a second portion, and a third portion, a fourth distance exists between the third portion and the edge, a fifth distance exists between the second portion and the edge, a sixth distance exists between the first portion and the edge, the sixth distance, the fifth distance, and the fourth distance are in a descending order, the first portion is disposed at one side of the first pixels, the second portion is disposed at one side of the second pixels, and the third portion is disposed at one side of the third pixels, wherein the first portion has a first width, the second portion has a second width, the third portion has a third width, and the first width, the second width, and the third width are in an ascending order; the first pixels have a fourth width, the second pixels have a fifth width, the third pixels have a sixth width, and the fourth width, the fifth width, and the sixth width are in an ascending order; wherein the third pixels are the pixels nearest the edge among the first, the second, and third pixels and aperture ratios of the first pixels, the second pixels, and the third pixels are the same.

5. The display panel according to claim 4 , further comprising: an integrated circuit, disposed on the substrate, and disposed below the first portion, the second portion, or the third portion, wherein the integrated circuit is electrically connected to at least one of the pixels.

6. The display panel according to claim 5 , wherein the integrated circuit is a gate driver or a data driver, the gate driver is configured to provide pulses for the pixels to enable and update the pixels, and the data driver is configured to provide, when the pixels are updated, pixel data corresponding to the pixels.

7. The display panel according to claim 4 , wherein the display panel has a bezel area, the bezel area has a seventh width, and the seventh width is a half of the third width.

8. The display panel according to claim 4 , wherein the first portion is L-shaped, the second portion is L-shaped, and the third portion is L-shaped, and two arms of each L have a same width.

9. A display wall, comprising: a plurality of display panels according claim 4 , wherein the display panels are arranged in an array to form the display wall.