An electronic circuit is disclosed. The electronic circuit includes a distributed power switch. In some embodiments, the electronic circuit also includes one or more of a distributed gate driver, a distributed gate pulldown device, a distributed diode, and a low resistance gate and/or source connection structure. An electronic component comprising the circuit, and methods of manufacturing the circuit are also disclosed.
Legal claims defining the scope of protection, as filed with the USPTO.
1. An electronic integrated circuit, comprising: a substrate comprising GaN; and a GaN half bridge circuit integrated on the substrate, wherein the half bridge circuit comprises: a high side circuit, comprising: a high side distributed GaN power switch formed on the substrate, wherein the high side distributed power switch comprises a plurality of high side sub-transistors, and wherein each high side sub-transistor comprises a high side gate, a high side source, and a high side drain, wherein the high side source of each high side sub-transistor is electrically connected with the high side source of each of the other high side sub-transistors at a common high side source node, and wherein the high side drain of each high side sub-transistor is electrically connected with the high side drain of each of the other high side sub-transistors at a common high side drain node, and a high side distributed GaN drive circuit formed on the substrate, wherein the high side distributed drive circuit comprises a high side distributed output stage formed by a plurality of high side sub-drivers, wherein each high side sub-driver comprises a high side input and a high side output, wherein the high side input of each high side sub-driver is electrically connected with the high side input of each of the other high side sub-drivers at a single common high side input node, and wherein the high side output of each high side sub-driver is connected to a high side gate of one or more corresponding high side sub-transistors of the high side sub-transistors of the high side distributed power switch such that the high side output of each high side sub-driver is configured to control whether the one or more corresponding high side sub-transistors is conductive or non-conductive between the common high side source node and the common high side drain node based on a voltage value at the single common high side input node, wherein the voltage value at the single common high side input node determines whether the high side sub-transistors are conductive or high side non-conductive, wherein the high side distributed GaN drive circuit is configured to receive a changing high side input logic signal at the single common high side input node, wherein the high side output of each high side sub-driver is configured to generate a corresponding changing high side output logic signal based on the changing high side input logic signal, and wherein the changing high side input logic signal and the corresponding changing high side output logic signal each change between first and second voltage values, wherein the high side distributed GaN drive circuit is configured to control an electrical conductivity of each of the high side sub-transistors of the high side distributed GaN power switch such that the high side sub-transistors are turned on or off at substantially the same time, and a low side circuit, comprising: a low side distributed low side GaN power switch formed on the substrate, wherein the low side distributed power switch comprises a plurality of low side sub-transistors, and wherein each low side sub-transistor comprises a low side gate, a low side source, and a low side drain, wherein the low side source of each low side sub-transistor is electrically connected with the low side source of each of the other low side sub-transistors at a common low side source node, and wherein the low side drain of each low side sub-transistor is electrically connected with the low side drain of each of the other low side sub-transistors at a common low side drain node, a low side distributed GaN drive circuit formed on the substrate, wherein the low side distributed drive circuit comprises a low side distributed output stage formed by a plurality of low side sub-drivers, wherein each low side sub-driver comprises a low side input and a low side output, wherein the low side input of each low side sub-driver is electrically connected with the low side input of each of the other low side sub-drivers at a single common low side input node, and wherein the low side output of each low side sub-driver is connected to a low side gate of one or more corresponding low side sub-transistors of the low side sub-transistors of the low side distributed power switch such that the low side output of each low side sub-driver is configured to control whether the one or more corresponding low side sub-transistors is conductive or non-conductive between the common low side source node and the common low side drain node based on a voltage value at the single common low side input node, wherein the voltage value at the single common low side input node determines whether the low side sub-transistors are conductive or low side non-conductive, wherein the low side distributed GaN drive circuit is configured to receive a changing low side input logic signal at the single common low side input node, wherein the low side output of each low side sub-driver is configured to generate a corresponding changing low side output logic signal based on the changing low side input logic signal, and wherein the changing low side input logic signal and the corresponding changing low side output logic signal each change between first and second voltage values, wherein the low side distributed GaN drive circuit is configured to control an electrical conductivity of each of the low side sub-transistors of the low side distributed GaN power switch such that the low side sub-transistors are turned on or off at substantially the same time, and a low side signal generator, configured to generate a low side signal at the single common low side input node to control the low side sub-transistors of the low side distributed GaN power switch with the low side sub-drivers of the low side distributed GaN drive circuit, wherein the low side signal generator is further configured to generate a high side control signal wherein the high side circuit is configured to generate a high side signal to control the high side GaN power switch, and wherein the high side circuit is configured to generate the high side signal based on the high side control signal from the low side signal generator.
2. The electronic circuit of claim 1 , wherein the sub-transistors of each of the high side and low side distributed power switches are respectively spaced according to a first pitch, and the sub-drivers of each of the high side and low side distributed drive circuits are respectively spaced according to a second pitch, and wherein the second pitch is equal to N times the first pitch, wherein N is an integer.
3. The electronic circuit of claim 1 , wherein the high side and low side inputs of the high side and low side sub-drivers of the high side and low side distributed drive circuits are respectively connected to a high side node and a low side node by a plurality of conductors, and wherein the conductors have substantially identical impedances.
4. The electronic circuit of claim 1 , wherein the outputs of the high side and low side sub-drivers of the high side and low side distributed drive circuits are connected to the high side and low side sub-transistors of the high side and low side distributed power switches by a plurality of conductors, and wherein the conductors have substantially identical impedances.
5. An electronic component comprising: a package base; and at least one GaN-based die secured to the package base and including an electronic circuit comprising: a substrate comprising GaN; and a GaN half bridge circuit integrated on the substrate, wherein the half bridge circuit comprises: a high side circuit, comprising: a high side distributed GaN power switch formed on the die, wherein the high side distributed power switch comprises a plurality of high side sub-transistors, and wherein each high side sub-transistor comprises a high side gate, a high side source, and a high side drain, wherein the high side source of each high side sub-transistor is electrically connected with the high side source of each of the other high side sub-transistors at a high side common source node, and wherein the high side drain of each high side sub-transistor is electrically connected with the high side drain of each of the other high side sub-transistors at a common high side drain node, and a high side distributed GaN drive circuit formed on the die, wherein the high side distributed drive circuit comprises a high side distributed output stage formed by a plurality of high side sub-drivers, wherein each high side sub-driver comprises a high side input and a high side output, wherein the high side input of each high side sub-driver is electrically connected with the high side input of each of the other high side sub-drivers at a single high side common input node, and wherein the high side output of each high side sub-driver is connected to a high side gate of one or more corresponding sub high side-transistors of the high side sub-transistors of the high side distributed power switch such that the high side output of each high side sub-driver is configured to control whether the one or more corresponding sub high side-transistors is conductive or non-conductive between the high side common source node and the high side common drain node based on a value voltage at the single high side common input node, wherein the voltage value at the single high side common input node determines whether the high side sub-transistors are conductive or non-conductive, wherein the high side distributed GaN drive circuit is configured to receive a changing high side input logic signal at the single common high side input node, wherein the high side output of each high side sub-driver is configured to generate a corresponding changing high side output logic signal based on the changing high side input logic signal, and wherein the changing high side input logic signal and the corresponding changing high side output logic signals each change between first and second voltage values, wherein the high side distributed GaN drive circuit is configured to control an electrical conductivity of each of the high side sub-transistors of the high side distributed GaN power switch such that the high side sub-transistors are turned on or off at substantially the same time, and a low side circuit, comprising: a low side distributed low side GaN power switch formed on the substrate, wherein the low side distributed power switch comprises a plurality of low side sub-transistors, and wherein each low side sub-transistor comprises a low side gate, a low side source, and a low side drain, wherein the low side source of each low side sub-transistor is electrically connected with the low side source of each of the other low side sub-transistors at a common low side source node, and wherein the low side drain of each low side sub-transistor is electrically connected with the low side drain of each of the other low side sub-transistors at a common low side drain node, a low side distributed GaN drive circuit formed on the substrate, wherein the low side distributed drive circuit comprises a low side distributed output stage formed by a plurality of low side sub-drivers, wherein each low side sub-driver comprises a low side input and a low side output, wherein the low side input of each low side sub-driver is electrically connected with the low side input of each of the other low side sub-drivers at a single common low side input node, and wherein the low side output of each low side sub-driver is connected to a low side gate of one or more corresponding low side sub-transistors of the low side sub-transistors of the low side distributed power switch such that the low side output of each low side sub-driver is configured to control whether the one or more corresponding low side sub-transistors is conductive or non-conductive between the common low side source node and the common low side drain node based on a voltage value at the single common low side input node, wherein the voltage value at the single common low side input node determines whether the low side sub-transistors are conductive or low side non-conductive, wherein the low side distributed GaN drive circuit is configured to receive a changing low side input logic signal at the single common low side input node, wherein the low side output of each low side sub-driver is configured to generate a corresponding changing low side output logic signal based on the changing low side input logic signal, and wherein the changing low side input logic signal and the corresponding changing low side output logic signal each change between first and second voltage values, wherein the low side distributed GaN drive circuit is configured to control an electrical conductivity of each of the low side sub-transistors of the low side distributed GaN power switch such that the low side sub-transistors are turned on or off at substantially the same time, and a low side signal generator, configured to generate a low side signal at the single common low side input node to control the low side sub-transistors of the low side distributed GaN power switch with the low side sub-drivers of the low side distributed GaN drive circuit, wherein the low side signal generator is further configured to generate a high side control signal, wherein the high side circuit is configured to generate a high side signal at the single common high side input node to control the high side sub-transistors of the high side distributed GaN power switch with the high side sub-drivers of the high side distributed GaN drive circuit, and wherein the high side circuit is configured to generate the high side signal based on the high side control signal from the low side signal generator.
6. The electronic component of claim 5 , wherein the sub-transistors of each of the high side and low side distributed power switches are respectively spaced according to a first pitch, and the sub-drivers of each of the high side and low side distributed drive circuits are respectively spaced according to a second pitch, and wherein the second pitch is equal to N times the first pitch, wherein N is an integer.
7. The electronic component of claim 5 , wherein the inputs of the sub-drivers of each of the high side and low side distributed drive circuits are connected to a node by a plurality of conductors, and wherein the conductors have substantially identical impedances.
8. The electronic component of claim 5 , wherein the high side and low side outputs of the high side and low side sub-drivers of the high side and low side distributed drive circuits are respectively connected to the high side and low side sub-transistors of the high side and low side distributed power switches by a plurality of conductors, and wherein the conductors have substantially identical impedances.
9. An electronic integrated circuit, comprising: a substrate comprising GaN; a distributed GaN power switch formed on the substrate, wherein the distributed power switch comprises a plurality of power sub-transistors, and wherein each power sub-transistor comprises a gate, a source, and a drain, wherein the source of each sub-transistor is electrically connected with the source of each of the other sub-transistors at a common source node on the substrate, and wherein the drain of each sub-transistor is electrically connected with the drain of each of the other sub-transistors at a common drain node on the substrate; a distributed GaN pulldown transistor formed on the substrate, wherein the distributed pulldown transistor comprises a plurality of pulldown sub-transistors, wherein each pulldown sub-transistor comprises a gate, a source, and a drain, wherein the gates of the pulldown sub-transistors are electrically connected together at a common input node, wherein the sources of the pulldown sub-transistors are each connected to the common source node, and wherein the drains of the pulldown sub-transistors are each connected to the gate of one or more corresponding power sub-transistors such that each pulldown sub-transistor is configured to substantially prevent electrical conductivity of the corresponding one or more power sub-transistors between the common source node and the common drain node based on an input at the common input node; and a pulldown driver circuit configured to receive a changing first logic signal and to generate a second changing logic signal based on the first changing logic signal, wherein the pulldown driver circuit is further configured to provide the second changing logic signal to the common input node of the distributed GaN pulldown transistor, wherein the changing first logic signal and the changing second logic signal each change between first and second voltage values, wherein the distributed GaN power switch and the distributed GaN pulldown transistor are both GaN devices and are integrated on a GaN die.
10. The electronic circuit of claim 9 , wherein the sub-transistors of the distributed power switch are spaced according to a first pitch, and the pulldown sub-transistors of the distributed pulldown transistor are spaced according to a second pitch, and wherein the first pitch is equal to N times the second pitch, wherein N is an integer.
11. The electronic circuit of claim 9 , further comprising a first distributed driver comprising a plurality of first sub-drivers, wherein the gates of the power sub-transistors are each connected with an output of a corresponding first sub-driver.
12. The electronic circuit of claim 11 , further comprising a second distributed driver comprising a plurality of second sub-drivers, wherein the gates of the pulldown sub-transistors are each connected with an output of a corresponding second sub-driver.
13. The electronic circuit of claim 9 , further comprising a distributed drive circuit formed on the substrate, wherein the distributed drive circuit comprises a distributed output stage formed by a plurality of sub-drivers, wherein each sub-driver comprises an input and an output, and wherein the output of each sub-driver is connected to a gate of one or more corresponding sub-transistors of the sub-transistors of the distributed power switch.
14. An electronic component, comprising: a package base; and at least one GaN-based die secured to the package base and including an electronic circuit comprising: a substrate comprising GaN; a distributed GaN power switch formed on the substrate, wherein the distributed power switch comprises a plurality of power sub-transistors, and wherein each power sub-transistor comprises a gate, a source, and a drain, wherein the source of each sub-transistor is electrically connected with the source of each of the other sub-transistors at a common source node on the substrate, and wherein the drain of each sub-transistor is electrically connected with the drain of each of the other sub-transistors at a common drain node on the substrate; a distributed GaN pulldown transistor formed on the substrate, wherein the distributed pulldown transistor comprises a plurality of pulldown sub-transistors, wherein each pulldown sub-transistor comprises a gate, a source, and a drain, wherein the gates of the pulldown sub-transistors are electrically connected together at a common input node, wherein the sources of the pulldown sub-transistors are each connected to the common source node, and wherein the drains of the pulldown sub-transistors are each connected to the gate of one or more corresponding power sub-transistors such that each pulldown sub-transistor is configured to substantially prevent electrical conductivity of the corresponding one or more power sub-transistors between the common source node and the common drain node based on an input at the common input node; and a pulldown driver circuit configured to receive a changing first logic signal and to generate a second changing logic signal based on the first changing logic signal, wherein the pulldown driver circuit is further configured to provide the second changing logic signal to the common input node of the distributed GaN pulldown transistor, wherein the changing first logic signal and the changing second logic signal each change between first and second voltage values, wherein the distributed GaN power switch and the distributed GaN pulldown transistor are both GaN devices and are integrated on a GaN die.
15. The electronic component of claim 14 , wherein the sub-transistors of the distributed power switch are spaced according to a first pitch, and the pulldown sub-transistors of the distributed pulldown transistor are spaced according to a second pitch, and wherein the first pitch is equal to N times the second pitch, wherein N is an integer.
16. The electronic component of claim 14 , wherein the electronic circuit further comprises a first distributed driver comprising a plurality of first sub-drivers, wherein the gates of the power sub-transistors are each connected with an output of a corresponding first sub-driver.
17. The electronic component of claim 16 , wherein the electronic circuit further comprises a second distributed driver comprising a plurality of second sub-drivers, wherein the gates of the pulldown sub-transistors are each connected with an output of a corresponding second sub-driver.
18. The electronic component of claim 14 , wherein the electronic circuit further comprises a distributed drive circuit formed on the substrate, wherein the distributed drive circuit comprises a distributed output stage formed by a plurality of sub-drivers, wherein each sub-driver comprises an input and an output, and wherein the output of each sub-driver is connected to a gate of one or more corresponding sub-transistors of the sub-transistors of the distributed power switch.
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August 20, 2015
March 10, 2020
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