There is to provide a power circuit capable of stabilizing an internal power source voltage and assuring a normal operation of a load circuit. According to one embodiment, the power circuit includes a regulator which generates an output voltage using an entered input voltage, a voltage detecting circuit which detects the output voltage, and a clamp circuit which outputs an internal power source voltage based on the output voltage and in a first failure that the output voltage is larger than a predetermined first voltage, outputs the internal power source voltage suppressed to the first voltage and less, in which the clamp circuit outputs the internal power source voltage to the logic circuit which operates with the internal power source voltage of the first voltage and less and the voltage detecting circuit outputs the first failure to the logic circuit when detecting the first failure.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A power circuit comprising: a sub regulator which generates an output voltage using an entered input voltage; a main regulator which generates an internal power source voltage using the output voltage; and a voltage detecting circuit which detects the internal power source voltage, wherein, in a failure in which the internal power source voltage is larger than a predetermined first voltage, the sub regulator generates the output voltage so that the internal power source voltage is suppressed to a voltage less than or equal to a second voltage that is larger than the first voltage, wherein the main regulator outputs the internal power source voltage to a logic circuit which operates with the internal power source voltage of less than or equal to the second voltage, and wherein when detecting the failure, the voltage detecting circuit outputs the failure to the logic circuit and the logic circuit notifies the failure to outside circuitry, wherein the main regulator includes a first negative feedback amplifier and a first output transistor having a gate coupled to an output of the first negative feedback amplifier, wherein the sub regulator includes a second negative feedback amplifier and a second output transistor having a gate coupled to an output of the second negative feedback amplifier, wherein an output of the first output transistor is fed back to the first negative feedback amplifier through a first feedback resistor, wherein the output of the first output transistor is fed back to the second negative feedback amplifier through a second feedback resistor, and wherein the first and second feedback resistors are coupled to the output of the first output transistor.
2. The circuit according to claim 1 , wherein the internal power source voltage, in a normal case where the main regulator generates the internal power source voltage less than or equal to the first voltage, is less than the internal power source voltage in the failure.
3. The circuit according to claim 1 , wherein the internal power source voltage suppressed to the voltage less than or equal to the second voltage in the failure, is less than or equal to an absolute maximum rating voltage of a low withstand element included in the logic circuit.
4. The circuit according to claim 1 , wherein the voltage detecting circuit includes an overvoltage detecting circuit and a low voltage detecting circuit, wherein the overvoltage detecting circuit outputs the failure to the logic circuit when detecting the failure, and wherein when detecting a second failure that the internal power source voltage is less than a predetermined third voltage, the low voltage detecting circuit outputs the second failure to the logic circuit.
5. The circuit according to claim 1 , wherein the first feedback resistor is a variable resistor capable of making the internal power source voltage, which the main regulator generates, larger than the first voltage.
6. The circuit according to claim 1 , wherein the sub regulator includes a current detecting circuit which detects a current of the second negative feedback amplifier.
7. The circuit according to claim 1 , wherein the second feedback resistor is a variable resistor capable of making the internal power source voltage, which the main regulator generates, larger than the output voltage which the sub regulator generates.
8. The circuit according to claim 1 , wherein the sub regulator includes: a detecting transistor to which an output of the second negative feedback amplifier is coupled, and an overcurrent detecting circuit which detects overcurrent from an output of the detecting transistor.
9. The circuit according to claim 1 , wherein a reference voltage used in the first negative feedback amplifier is independent of a reference voltage used in the second negative feedback amplifier.
10. The circuit according to claim 1 , further comprising an ADC which detects the internal power source voltage.
11. The circuit according to claim 1 , wherein the second feedback resistor is a ladder resistor, and wherein the voltage detecting circuit detects the internal power source voltage through the ladder resistor.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
August 21, 2018
March 24, 2020
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