A method to fabricate an electronic package is described and includes the steps of: connecting a plurality of semiconductor chips to at least one surface of a substrate using a connect pad; encapsulating the semiconductor chips with a non-conductive material; and forming an electro-magnetic interference shield layer over the encapsulated semiconductor chip.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A method of fabricating an electronic package, comprising the steps of: connecting a plurality of semiconductor chips to at least one surface of a substrate using a connect pad; encapsulating the semiconductor chips with a non-conductive material by a first molding process; reducing a thickness of the semiconductor chips by a process of trimming or grinding from a top encapsulation layer of the semiconductor chips to form thin semiconductor chips; and forming an electro-magnetic interference shield layer over the thin semiconductor chips by a second molding process.
2. The method according to claim 1 , wherein the substrate is a single layer or multilayer substrate with at least one ground trace.
3. The method according to claim 1 , wherein the substrate includes at least one ground terminal and is electrically connected to a ground trace.
4. The method according to claim 3 , wherein the encapsulation layer is cut through exposing the ground trace on the substrate.
5. The method according to claim 4 , wherein a carrier is disposed on one side of the substrate.
6. The method according to claim 5 , wherein the electro-magnetic interference shield layer extends over a side surface of the substrate.
7. The method according to claim 6 , wherein the electro-magnetic interference shield layer covers a bottom surface of the semiconductor chip.
8. The method according to claim 1 , wherein edges of the encapsulation layer and the electro-magnetic interference shield layer are bevelled by a process of cutting.
9. The method according to claim 8 , wherein the connect pad is a chip connect pad and a substrate to chip connect pad.
10. The method according to claim 1 , wherein at least part of the electro-magnetic interference shield layer is in contact with the thin semiconductor chips without a gap formed therebetween.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
September 12, 2018
March 24, 2020
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