Some embodiments include an apparatus having a transistor associated with a vertically-extending semiconductor pillar. The transistor includes an upper source/drain region within the vertically-extending semiconductor pillar, a lower source/drain region within the vertically-extending semiconductor pillar, and a channel region within the vertically-extending semiconductor pillar and between the upper and lower source/drain regions. The transistor also includes a gate along the channel region. A wordline is coupled with the gate of the transistor. A digit line is coupled with the lower source/drain region of the transistor. A programmable device is coupled with the upper source/drain region of the transistor. A body connection line is over the wordline and extends parallel to the wordline. The body connection line has a lateral edge that penetrates into the vertically-extending semiconductor material pillar. The body connection line is of a different composition than the semiconductor material pillar.
Legal claims defining the scope of protection, as filed with the USPTO.
1. An apparatus, comprising: a transistor associated with a semiconductor structure and comprising a first source/drain region within the semiconductor structure, a second source/drain region within the semiconductor structure, and a channel region within the semiconductor structure and between the first and second source/drain regions; the transistor also comprising a gate along the channel region; a wordline coupled with the gate of the transistor; a digit line coupled with the first source/drain region of the transistor; a programmable device coupled with the second source/drain region of the transistor; and a body connection line over the wordline and extending parallel to the wordline; the body connection line having a lateral edge that penetrates into the semiconductor structure; the body connection line comprising a different composition than the semiconductor structure.
2. The apparatus of claim 1 wherein the body connection line comprises polycrystalline silicon and the semiconductor structure comprises monocrystalline silicon.
3. The apparatus of claim 1 comprising a first nitride liner along the semiconductor structure and over the body connection line, and comprising a second nitride liner along the wordline and under the body connection line; the body connection line directly contacting both of the first and second nitride liners.
4. The apparatus of claim 1 wherein the semiconductor structure comprises a pair of opposing sidewalls along a cross-section, with said opposing sidewalls being a first sidewall and a second sidewall; wherein the gate has a first portion along the first sidewall and a second portion along the second sidewall; wherein the body connection line is one of a pair of body connection lines, with said pair of body connection lines being a first body connection line and a second body connection line; wherein the first body connection line is over the first portion of the gate and extends into the first sidewall of the semiconductor structure; wherein the second body connection line is over the second portion of the gate and extends into the second sidewall of the semiconductor structure; and wherein the first and second body connection lines comprise a same composition as one another.
5. An apparatus, comprising: access transistors arranged in an array comprising rows and columns; each of the access transistors being associated with a semiconductor structure and comprising a first source/drain region within the associated semiconductor structure, a second source/drain region within the associated semiconductor structure, and a channel region within the associated semiconductor structure and between the first and second source/drain regions; each of the access transistors also comprising a gate along the channel region; wordlines extending along the rows and comprising the gates of the access transistors; digit lines extending along the columns and being electrically connected with the first source/drain regions of the access transistors; programmable devices electrically connected with the second source/drain regions of the access transistors; and body connection lines over the wordlines and extending parallel to the wordlines; the body connection lines having lateral edges that penetrate into the semiconductor structures and comprising a different composition than the semiconductor structures.
6. The apparatus of claim 5 wherein the body connection lines are all held at a common voltage.
7. The apparatus of claim 5 wherein the body connection lines comprise polycrystalline silicon and the semiconductor structures comprise monocrystalline silicon.
8. The apparatus of claim 5 wherein the programmable devices comprise charge-storage devices.
9. The apparatus of claim 5 wherein the programmable devices comprise capacitors.
10. The apparatus of claim 9 wherein the capacitors and access transistors together comprise 1-transistor-1-capacitor (1T1C) memory cells.
11. The apparatus of claim 9 wherein the capacitors and access transistors together comprise 2-transistor-1-capacitor (2T1C) memory cells.
12. The apparatus of claim 5 wherein the semiconductor structures extend upwardly from a base of semiconductor material; and wherein the digit lines comprise conductively-doped regions extending along the columns and within lower regions of the semiconductor structures above the base of semiconductor material.
13. The apparatus of claim 5 wherein the semiconductor structures extend upwardly from a base of semiconductor material; and wherein the digit lines comprise metal-containing lines extending along the columns and within lower regions of the semiconductor structures above the base of semiconductor material.
14. The apparatus of claim 5 wherein the semiconductor structures extend upwardly from a base of semiconductor material; and wherein the digit lines comprise metal-containing lines extending along the columns and within lower regions of the semiconductor structures above the base of semiconductor material, and comprise conductively-doped regions above the metal-containing lines and extending along the metal-containing lines.
15. An apparatus, comprising: access transistors arranged in an array comprising rows and columns; each of the access transistors being associated with a vertically-extending semiconductor pillar and comprising an upper source/drain region within the associated vertically-extending semiconductor pillar, a lower source/drain region within the associated vertically-extending semiconductor pillar, and a channel region within the associated vertically-extending semiconductor pillar and between the upper and lower source/drain regions; each of the access transistors also comprising a first gate portion along a first side of the channel region and a second gate portion along an opposing second side of the channel region; the vertically-extending semiconductor pillars comprising silicon; wordlines extending along the rows and comprising the gates of the access transistors; each of the wordlines having a first portion comprising the first gate portions along one of the rows, and having a second portion comprising the second gate portions along said one of the rows; digit lines extending along the columns and being coupled with the lower source/drain regions of the access transistors; capacitors coupled with the upper source/drain regions of the access transistors; body connection lines over the wordlines and extending parallel to the wordlines; the body connection lines being directly against the vertically-extending semiconductor pillars and comprising a different composition than the vertically-extending semiconductor pillars; the body connection lines comprising semiconductor material; upper nitride liners along the vertically-extending semiconductor pillars and over the body connection lines; lower nitride liners along the wordlines and under the body connection lines; and the body connection lines directly contacting both the upper nitride liners and the lower nitride liners.
16. The apparatus of claim 15 wherein the body connection lines have lateral edges that penetrate into the vertically-extending semiconductor pillars; and wherein each body connection line is over a first portion of one wordline and is over a second portion of a second wordline adjacent said one wordline.
17. The apparatus of claim 15 wherein the body connection lines comprise polycrystalline silicon and the vertically-extending semiconductor pillars comprise monocrystalline silicon.
18. The apparatus of claim 15 wherein the upper nitride liners are spaced from the vertically-extending semiconductor pillars by silicon dioxide.
19. The apparatus of claim 15 wherein the upper and lower nitride liners consist of silicon nitride.
20. The apparatus of claim 15 wherein the capacitors and access transistors together comprise 1-transistor-1-capacitor (1T1C) memory cells.
21. The apparatus of claim 15 wherein the capacitors and access transistors together comprise 2-transistor-1-capacitor (2T1C) memory cells.
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February 19, 2019
April 14, 2020
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