A cascaded synchronous bootstrap supply circuit with reduced voltage drop between the cascaded bootstrap capacitors by replacing bootstrap diodes with gallium nitride (GaN) transistors. GaN transistors have a much lower forward voltage drop than diodes, thus providing a cascaded gate driver bootstrap supply circuit with a reduced drop in bootstrap capacitor voltage, which is particularly important as the number of levels increases.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A cascaded synchronous bootstrap gate driver circuit for driving a plurality of power transistors of a multi-level converter, comprising: a plurality of cascaded drive control loops, each loop including a gallium nitride (GaN) transistor having a gate terminal connected to a gate terminal of one of the plurality of power transistors, a bootstrap capacitor charged by a current passing through the GaN transistor, and a drive stage connected to the bootstrap capacitor and configured to selectively couple and decouple an adjacent drive control loop, wherein each drive control loop is configured to selectively drive a respective one of the plurality of power transistors of the multi-level converter.
2. The cascaded synchronous bootstrap gate driver circuit of claim 1 , wherein each drive control loop further comprises a resistor connected in series with, and disposed between, the GaN transistor and the bootstrap capacitor.
3. The cascaded synchronous bootstrap gate driver circuit of claim 1 , wherein each bootstrap capacitor is connected in series with a current terminal of a respective GaN transistor.
4. The cascaded synchronous bootstrap gate driver circuit of claim 1 , wherein each GaN transistor is a depletion mode transistor.
5. The cascaded synchronous bootstrap gate driver circuit of claim 1 , wherein each GaN transistor is an enhancement mode transistor.
6. The cascaded synchronous bootstrap gate driver circuit of claim 5 , wherein each bootstrap capacitor comprises a first bootstrap capacitor, and each drive control loop further comprises a second bootstrap capacitor, wherein each first bootstrap capacitor is connected in series with a current terminal of a respective GaN transistor, and wherein each second bootstrap capacitor is connected to a gate terminal of the respective GaN transistor.
7. The cascaded synchronous bootstrap gate driver circuit of claim 1 , wherein at least one of the drive control loops further comprises a voltage regulator connected to the bootstrap capacitor to regulate the voltage on the capacitor.
8. The cascaded synchronous bootstrap gate driver circuit of claim 7 , wherein the voltage regulator comprises a linear dropout (LDO) regulator.
9. The cascaded synchronous bootstrap gate driver circuit of claim 7 , wherein the voltage regulator comprises a switched-mode power supply.
10. The cascaded synchronous bootstrap gate driver circuit of claim 1 , wherein each drive control loop further comprises a Zener diode in parallel with a respective bootstrap capacitor.
11. The cascaded synchronous bootstrap gate driver circuit of claim 1 , further comprising a base drive control loop that is a ground referenced loop, and wherein each of the other drive control loops is a non-ground referenced loop.
12. The cascaded synchronous bootstrap gate driver circuit of claim 11 , wherein the base drive control loop comprises a bootstrap capacitor connected in series with a diode and a resistor, and a drive stage connected to the bootstrap capacitor and configured to selectively couple and decouple an adjacent drive control loop.
13. The cascaded synchronous bootstrap gate driver circuit of claim 1 , wherein each drive control loop is configured to drive a separate power transistor in a sequence.
14. The cascaded synchronous bootstrap gate driver circuit of claim 1 , wherein each drive stage comprises a controller, level shift logic, and complementary switches.
15. The cascaded synchronous bootstrap gate driver circuit of claim 1 , wherein the circuit is formed of discrete components.
16. The cascaded synchronous bootstrap gate driver circuit of claim 1 , wherein the circuit is formed of integrated circuit components.
17. The cascaded synchronous bootstrap gate driver circuit of claim 16 , wherein the circuit is a single integrated circuit.
18. The cascaded synchronous bootstrap gate driver circuit of claim 16 , wherein the circuit is formed of multiple integrated circuits that are coupled together.
19. The cascaded synchronous bootstrap gate driver circuit of claim 1 , further comprising a controller to balance voltage levels for flying capacitors connected in parallel with the power transistor of the multi-level converter.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
July 18, 2018
April 28, 2020
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