A transmission control protocol (TCP) session processing architecture for conducting numerous TCP sessions during testing of a network-under-test: multiple processor cores running, allocated to TCP session handling, and program instructions configured to distribute processing of each TCP session across multiple cores with a first set of cores allocated to handle TCP control, a second set of cores allocated to handle TCP packet transmission, and a third set of cores allocated to handle TCP packet receiving. The TCP session processing architecture also includes a shared memory accessible to the first, second and third sets of cores, that holds PCBs for each of numerous TCP sessions during the testing with update access controlled by an atomic spinlock processor instruction that each TCP state machine running on a core must engage to secure the update access to a respective PCB, in order to proceed with state processing of its respective TCP session.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A transmission control protocol (TCP) session processing architecture for conducting numerous TCP sessions during testing of a network-under-test (NUT), including: multiple processor cores running allocated to TCP session handling, some of the cores sharing a processor die; program instructions, stored in a memory of the TCP session processing architecture and configured to distribute processing of each TCP session across multiple cores, wherein a first set of cores is allocated to handle TCP session control, a second set of cores is allocated to handle transmission of TCP packets in a session, and a third set of cores is allocated to handle receipt of TCP packets in the session; a shared memory accessible to the first, second and third sets of cores, that holds protocol control blocks (PCBs) for each of the numerous TCP sessions during the testing of the NUT wherein the PCBs include state information that is updated during set-up and operation of a TCP session; and wherein update access to each of the PCBs is controlled by an atomic spinlock processor instruction that each state machine running on any of a first, second and third set of cores must engage to secure the update access to a respective PCB in order to proceed with state processing of its respective TCP session.
2. The TCP session processing architecture of claim 1 , wherein the first set of cores allocated to TCP session control further handles starting new streams and establishing a three-way handshake for each new session.
3. The TCP session processing architecture of claim 1 , wherein the numerous TCP sessions test one thousand to one million streams transmitted from the second set of cores to the NUT, responses to which are received at the third set of cores from the NUT.
4. The TCP session processing architecture of claim 1 , wherein the PCBs for each of the numerous TCP sessions store unique identifiers of streams, the states of the streams and a unique atomic spinlock for each session to guarantee exclusive access to the PCB that is accessible from the first, second and third sets of cores.
5. The TCP session processing architecture of claim 1 , wherein the atomic spinlock processor instruction is a processor supported instruction that determines availability of a lock on the PCB and sets the lock in a single clock cycle.
6. The TCP session processing architecture of claim 1 , wherein the numerous TCP sessions tests are conducted between emulated endpoint clients and a server on the NUT.
7. The TCP session processing architecture of claim 1 , wherein the numerous TCP sessions tests are conducted between numerous emulated endpoint clients and a plurality of servers on the NUT.
8. The TCP session processing architecture of claim 1 , wherein the multiple cores include four cores to 32 cores.
9. A transmission control protocol (TCP) session processing method for conducting numerous TCP sessions during testing of a network under test (NUT), including: distributing processing of each TCP session, among the numerous TCP sessions during the testing of the NUT, across multiple cores allocated to TCP session handling, some of the cores sharing a processor die, and each of the cores running a state machine; wherein a first set of cores is allocated to handle TCP session control, a second set of cores is allocated to handle transmission of TCP packets in a session, and a third set of cores is allocated to handle receipt of TCP packets in the session; each of the state machines running on the cores accessing a shared memory accessible to the first, second and third sets of cores, that holds protocol control blocks (PCBs) for each of the numerous TCP sessions, wherein the PCBs include state information that is updated by the state machines during set-up and operation of a TCP session; each of the state machines gaining update access to each of the PCBs by invoking an atomic spinlock processor instruction to secure the update access to a respective PCB in order to proceed with state processing a part of a respective TCP session; and conducting the numerous TCP sessions during the testing of the NUT.
10. The TCP session processing method of claim 9 , wherein the first set of cores allocated to TCP session control further handles starting new streams and establishing a three-way handshake for each new session.
11. The TCP session processing method of claim 9 , wherein the numerous TCP sessions test one thousand to one million streams transmitted from the second set of cores to the NUT, responses to which are received at the third set of cores from the NUT.
12. The TCP session processing method of claim 9 , wherein the PCBs for each of the numerous TCP sessions store unique identifiers of streams, the states of the streams and a unique atomic spinlock for each session to guarantee exclusive access to the PCB that is accessible from the first, second and third sets of cores.
13. The TCP session processing method of claim 9 , wherein the atomic spinlock processor instruction is a processor supported instruction that determines availability of a lock on the PCB and sets the lock in a single clock cycle.
14. The TCP session processing method of claim 9 , wherein the numerous TCP sessions test are conducted between emulated endpoint clients and a server on the NUT.
15. The TCP session processing method of claim 9 , wherein the numerous TCP sessions test are conducted between numerous emulated endpoint clients and a plurality of servers on the NUT.
16. The TCP session processing method of claim 9 , wherein the multiple cores include four cores to 32 cores.
17. A tangible non-transitory computer readable storage media storing computer program instructions that, when executed, cause hardware to support conducting numerous transmission control protocol (TCP) sessions during testing of a network under test (NUT), including: distributing processing of each TCP session, among the numerous TCP sessions during the testing of the NUT, across multiple cores allocated to TCP session handling, some of the cores sharing a processor die, and each of the cores running a state machine, wherein a first set of cores is allocated to handle TCP session control, a second set of cores is allocated to handle transmission of TCP packets in a session, and a third set of cores is allocated to handle receipt of TCP packets in the session; each of the state machines running on the cores accessing a shared memory accessible to the first, second and third sets of cores, that holds protocol control blocks (PCBs) for each of the numerous TCP sessions, wherein the PCBs include state information that is updated by the state machines during set-up and operation of a TCP session; each of the state machines gaining update access to each of the PCBs by invoking an atomic spinlock processor instruction to secure the update access to a respective PCB in order to proceed with state processing of a part of a respective TCP session; and conducting the numerous TCP sessions during the testing of the NUT.
18. The computer readable storage media of claim 17 , wherein the first set of cores allocated to TCP session control further handles starting new streams and establishing a three-way handshake for each new session.
19. The computer readable storage media of claim 17 wherein the PCBs for each of the numerous TCP sessions store unique identifiers of the streams, the states of the streams and a unique atomic spinlock for each session to guarantee exclusive access to the PCB that is accessible from the first, second and third sets of cores.
20. The computer readable storage media of claim 17 , wherein the atomic spinlock processor instruction is a processor supported instruction that determines availability of a lock on the PCB and sets the lock in a single clock cycle.
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May 14, 2018
May 19, 2020
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