A semiconductor device (A1) includes a semiconductor layer having a first face with a trench (3) formed thereon and a second face opposite to the first face, a gate electrode (41), and a gate insulating layer (5). The semiconductor layer includes a first n-type semiconductor layer (11), a second n-type semiconductor layer (12), a p-type semiconductor layer (13), and an n-type semiconductor region (14). The trench (3) is formed so as to penetrate through the p-type semiconductor layer (13) and to reach the second n-type semiconductor layer (12). The p-type semiconductor layer (13) includes an extended portion extending to a position closer to the second face of the semiconductor layer than the trench (3) is. Such structure allows suppressing dielectric breakdown in the gate insulating layer (5).
Legal claims defining the scope of protection, as filed with the USPTO.
1. A semiconductor device comprising: a layer of semiconductor having a first face and a second face opposite to the first face, the first face being provided with a first trench; a gate electrode provided in the trench; and an insulating layer provided in the trench for insulating the layer of semiconductor and the gate electrode from each other; wherein the layer of semiconductor includes a first semiconductor layer of a first conductivity type, and a second semiconductor layer of a second conductivity type opposite to the first conductivity type, the second semiconductor layer being generally closer to the first face than is the first semiconductor layer, wherein the trench extends through the second semiconductor layer and reaches the first semiconductor layer, the second semiconductor layer includes: a close portion close to the second face of the layer of semiconductor; and a sublayer disposed farther from the second face of the layer of semiconductor than is the close portion, the second semiconductor layer includes a channel region formed along the trench and in contact with the first semiconductor layer, the close portion and the trench are spaced apart from each other so that an upper interface of the close portion is at a same or substantially same height with a lower interface of the channel region, and the layer of semiconductor further comprises a semiconductor region of the second conductivity type, the semiconductor region being formed in the first semiconductor layer and extending, in the depthwise direction of the trench, from a bottom portion of the trench toward the second face of the layer of semiconductor beyond a part of the close portion.
2. The semiconductor device according to claim 1 , wherein the layer of semiconductor comprises a wide band gap semiconductor.
3. The semiconductor device according to claim 2 , wherein the layer of semiconductor is made of SiC.
4. The semiconductor device according to claim 1 , wherein a width of the close portion is smaller than half a distance between the first trench and an adjacent second trench.
5. The semiconductor device according to claim 4 , further comprising: a source electrode formed on the first face; a source region of the first conductivity type disposed between the source electrode and the sublayer of the second semiconductor layer; and an insulating film formed over the gate electrode, wherein a width of the source region is smaller than a width of the insulating film.
6. The semiconductor device according to claim 5 , wherein the insulating film overlaps with the source region.
7. The semiconductor device according to claim 6 , wherein a thickness of the source region is smaller than a thickness of the insulating film.
8. The semiconductor device according to claim 7 , wherein the layer of semiconductor is formed with a recessed portion overlapping with the close portion as viewed in the depthwise direction of the trench.
9. The semiconductor device according to claim 8 , wherein the recessed portion includes a bottom surface facing the close portion and a side surface connected to the bottom surface, and an impurity concentration at the bottom surface is greater than an impurity concentration at the side surface.
10. The semiconductor device according to claim 9 , wherein the impurity concentration at the bottom surface is 1×10 17 cm −3 ˜1×10 20 cm −3 and the impurity concentration at the side surface is 1×10 16 cm −3 ˜1×10 19 cm −3 .
11. The semiconductor device according to claim 10 , wherein the recessed portion has an opening that is smaller in size in the widthwise direction than the close portion.
12. The semiconductor device according to claim 11 , wherein the first semiconductor layer and the second semiconductor layer define a boundary between them, the boundary including a first bottom boundary formed by a bottom of the close portion and a second bottom boundary close to the trench, and the recessed portion is substantially equal in size in the widthwise direction to the first bottom boundary.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
April 9, 2019
June 16, 2020
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