In a motor drive system with inverter parallel connection, a laying cable impedance is identified by a test pulse, and a cross current suppression control gain is optimized to provide a power conversion apparatus that does not require a coupling reactor. In the motor drive system 1 in which the outputs of A-bank and B-bank inverters 20A and 20B are connected in parallel, a test pulse is outputted from the drive control unit 30 provided with the PWM controller 33 to the A and B bank inverters before operation. The laying cable impedance is identified from the DC voltage Vdc at the time of test pulse output and the response currents IA and IB. An adjustment gain is calculated from the ratio of installed cable impedance to specified cable impedance. Then, the proportional gain KP is multiplied to optimize the adjustment gain, and an on-delay time based on the optimized adjustment gain GL×KP is calculated during operation. The gate signal corrected by the calculated on-delay time is outputted to the corresponding inverter gate.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A power conversion apparatus configured to drive a motor having a plurality of PWM power converters with a common DC circuit and with their outputs connected in parallel, a DC voltage detector for detecting DC voltage values supplied to the PWM power converters of the plurality of banks, current sensors for respectively detecting the output currents of the PWM power converters of the plurality of banks, a drive controller for controlling the plurality of PWM power converters, the drive controller comprising: a PWM controller for outputting a PWM command for controlling a gate of semiconductor elements constituting the PWM power converter; test pulse output unit for outputting a test pulse for turning on/off a positive side semiconductor element and a negative side semiconductor element set by the number of parallel connection; an impedance identification unit for identifying a laying cable impedance from a output current acquired by the current sensor, at the time of test pulse generation output by the test pulse output unit before operation of the motor, and from a DC voltage of the PWM converter acquired by the DC voltage detector; an adjustment gain calculation unit for calculating adjustment gain of cross current suppression control based on the ratio of the installation cable impedance identified by the impedance identification unit to the specification cable impedance calculated from the specification of the installation cable; and a PWM command correction unit during motor drive operation for correcting the PWM command output from the PWM controller by the adjustment gain calculated by the adjustment gain calculation unit before the motor drive operation.
2. A power converter having first and second converters according to claim 1 , wherein, the impedance identification unit identify the laying cable impedance from first and second output currents acquired by first and second current sensors, at the time when test pulse generation commands are outputted to the semiconductor element connected to the positive pole side of a first PWM converter and to the semiconductor element connected to the negative pole side of the same phase of a second PWM converter, so that the current flows from the first converter to the second converter via the laying cable, and from the DC voltage of the PWM converter acquired by the DC voltage detector.
3. A power converter having first, second and third converters according to claim 1 , wherein, the impedance identification unit identify the laying cable impedance from first, second and third output currents acquired by first, second and third current sensors, at the time when a test pulse generation commands are outputted to the first PWM converter and to the second PWM converter, so that the current flows from the first converter to the second converter via the laying cable, and at the time when a test pulse generation commands are outputted to the second PWM converter and to the third PWM converter, so that the current flows from the second converter to the third converter via the laying cable, and at the time when a test pulse generation commands are outputted to the third PWM converter and to the first PWM converter, so that the current flows from the third converter to the first converter via the laying cable, individually, and from the DC voltage of the PWM converter acquired by the DC voltage detector.
4. A power converter according to claim 1 , further comprising: an average current calculation unit for calculating an average current of output current values of the plurality of PWM power converters detected by the current sensors; a current deviation detection units for detecting a current deviation by subtracting the average current calculated by the average current calculation unit from the output current value of each of the plurality of PWM converters acquired by the current sensors; a current deviation correction value calculation unit for calculating a current deviation correction value from the product of the current deviation calculated by the current deviation detection unit and the adjustment gain and proportional gain calculated by the adjustment gain calculation unit; and an on delay setting means for setting an on delay time for delaying the on signal of the PWM command when the current deviation correction value calculated by the current deviation correction value calculation unit satisfies a predetermined requirement.
5. A power converter according to claim 4 , wherein, the predetermined requirement is that, an on-delay time based on the current deviation correction value is set only when the current deviation correction value is a positive value and it does not exceed the upper limit value.
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July 5, 2019
July 28, 2020
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