A solid-state imaging device is provided that includes a pixel array with unit pixels. Each unit pixel includes, among other things, first and second photoelectric conversion portions; an electric charge accumulating portion that accumulates charges produced by the second photoelectric conversion portion, a counter electrode of the electric charge accumulating portion being connected to a variable voltage power source; and a charge-to-voltage conversion portion. For at least a part of a time period for which charges produced by the second photoelectric conversion portion are accumulated in the electric charge accumulating portion, a drive portion that controls an operation of the unit pixel causes a voltage of the variable voltage power source to be lower than that when a signal based on the charges accumulated in the electric charge accumulating portion is read out.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A solid-state imaging device, comprising: a pixel array portion in which a plurality of unit pixels are arranged; and a drive portion configured to control an operation of each of the unit pixels, wherein each of the unit pixels includes: a first photoelectric conversion portion, a second photoelectric conversion portion a sensitivity of which is lower than that of the first photoelectric conversion portion, an electric charge accumulating portion configured to accumulate electric charges produced by the second photoelectric conversion portion, a counter electrode of the electric charge accumulating portion being connected to a variable voltage power source that is settable to a voltage that includes a first voltage and a second voltage lower than the first voltage, a charge-to-voltage conversion portion, a first transfer gate portion configured to transfer the electric charges from the first photoelectric conversion portion to the charge-to-voltage conversion portion, a second transfer gate portion configured to couple potentials of the charge-to-voltage conversion portion and the electric charge accumulating portion to each other, and noise-reduction circuitry configured to reject high-frequency noise from the first voltage of the variable voltage power source, and wherein, for at least a part of a period of time for which the electric charges produced by the second photoelectric conversion portion are accumulated in the electric charge accumulating portion, the drive portion causes the voltage of the variable voltage power source to be lower than that when a signal based on the electric charges accumulated in the electric charge accumulating portion is read out.
2. The solid-state imaging device according to claim 1 , wherein the variable voltage power source outputs the first voltage through a low-pass filter comprising the noise-reduction circuitry.
3. The solid-state imaging device according to claim 2 , wherein the low-pass filter includes a resistor within a chip in which the solid-state imaging device is provided, and a capacitor mounted to an outside of the chip.
4. The solid-state imaging device according to claim 1 , wherein the variable voltage power source outputs the first voltage through a sample-and-hold circuit comprising the noise-reduction circuitry.
5. The solid-state imaging device according to claim 4 , wherein the sample-and-hold circuit includes a switch within a chip in which the solid-state imaging device is provided, and a capacitor mounted to an outside of the chip.
6. The solid-state imaging device according to claim 1 , wherein the unit pixel further includes a third transfer gate portion configured to transfer the electric charges from the second photoelectric conversion portion to the electric charge accumulating portion, and an overflow path transferring the electric charges overflowing from the second photoelectric conversion portion to the electric charge accumulating portion, the overflow path being formed in a lower portion of a gate electrode of the third transfer gate portion.
7. The solid-state imaging device according to claim 6 , wherein the drive portion includes a signal producing portion configured to produce a gate signal for the first transfer gate portion, and a gate signal for the third transfer gate portion, and output any one of these gate signals to a common first signal line, and a switching portion configured to output the gate signal of the first transfer gate portion inputted through the first signal line to a second signal line, and output the gate signal of the third transfer gate portion inputted through the first signal line to a third signal line.
8. The solid-state imaging device according to claim 1 , wherein the second photoelectric conversion portion and the electric charge accumulating portion are connected to each other without going through a transfer gate portion.
9. The solid-state imaging device according to claim 1 , wherein the unit pixel further includes a fourth transfer gate portion connected between the second transfer gate portion and the charge-to-voltage conversion portion.
10. The solid-state imaging device according to claim 9 , wherein the drive portion includes a signal producing portion configured to produce a gate signal for the second transfer gate portion and a gate signal for the fourth transfer gate portion, and output any one of these gate signals to a common fourth signal line, and a switching portion configured to output the gate signal for the second transfer gate portion inputted through the fourth signal line to a fifth signal line, and output the gate signal for the fourth transfer gate portion inputted through the fourth signal line to a sixth signal line.
11. The solid-state imaging device according to claim 1 , wherein in a case where a first data signal based on the electric charges produced by the first photoelectric conversion portion is read out, the drive portion causes the second transfer gate portion to be in a non-conduction state and in a case where a second data signal based on the electric charges produced by the second photoelectric conversion portion is read out, the drive portion causes the second transfer gate portion to be in a conduction state.
12. The solid-state imaging device according to claim 11 , wherein the drive portion makes control in such a way that in a case where the first data signal is read out, after a first reset signal is read out in a state in which the charge-to-voltage conversion portion is reset, the first data signal is read out, and in a case where the second data signal is read out, after the second data signal is read out, a second reset signal is read out in a state in which an area in which the potentials of the charge-to-voltage conversion portion and the electric charge accumulating portion are coupled to each other is reset.
13. The solid-state imaging device according to claim 12 , further comprising: a signal processing portion configured to produce a first difference signal as a difference between the first data signal and the first reset signal, and a second difference signal as a difference between the second data signal and the second reset signal, use the first difference signal as a pixel signal of the unit pixel in a case where a value of the first difference signal is equal to or smaller than a predetermined threshold value, and use the second difference signal as the pixel signal of the unit pixel in a case where the value of the first difference signal exceeds the threshold value.
14. The solid-state imaging device according to claim 12 , further comprising: a signal processing portion configured to produce a first difference signal as a difference between the first data signal and the first reset signal, and a second difference signal as a difference between the second data signal and the second reset signal, and synthesize the first difference signal and the second difference signal in a synthesis ratio set on a basis of a value of the first difference signal, thereby producing a pixel signal of the unit pixel.
15. A method of driving a solid-state imaging device including a pixel array portion in which a plurality of unit pixels are arranged, each of the unit pixels including: a first photoelectric conversion portion, a second photoelectric conversion portion a sensitivity of which is lower than that of the first photoelectric conversion portion, an electric charge accumulating portion configured to accumulate electric charges produced by the second photoelectric conversion portion, a charge-to-voltage conversion portion, a first transfer gate portion configured to transfer the electric charges from the first photoelectric conversion portion to the charge-to-voltage conversion portion, a second transfer gate portion configured to couple potentials of the charge-to-voltage conversion portion and the electric charge accumulating portion to each other, and noise-reduction circuitry, wherein a counter electrode of the electric charge accumulating portion is connected to a variable voltage power source that is settable to a voltage that includes a first voltage and a second voltage lower than the first voltage, the method comprising: using the noise-reduction circuitry to reject high-frequency noise from the first voltage of the variable voltage power source; and for at least a part of a period of time for which the electric charges produced by the second photoelectric conversion portion are accumulated in the electric charge accumulating portion, causing the voltage of the variable voltage power source to be lower than that when a signal based on the electric charges accumulated in the electric charge accumulating portion is read out.
16. An electronic apparatus, comprising: a solid-state imaging device including a pixel array portion in which a plurality of unit pixels are arranged, and a drive portion configured to control an operation of each of the unit pixels, wherein each of the unit pixels includes: a first photoelectric conversion portion, a second photoelectric conversion portion a sensitivity of which is lower than that of the first photoelectric conversion portion, an electric charge accumulating portion configured to accumulate electric charges produced by the second photoelectric conversion portion, a counter electrode of the electric charge accumulating portion being connected to a variable voltage power source that is settable to a voltage that includes a first voltage and a second voltage lower than the first voltage, a charge-to-voltage conversion portion, a first transfer gate portion configured to transfer the electric charges from the first photoelectric conversion portion to the charge-to-voltage conversion portion, a second transfer gate portion configured to couple potentials of the charge-to-voltage conversion portion and the electric charge accumulating portion to each other, and noise-reduction circuitry configured to reject high-frequency noise from the first voltage of the variable voltage power source, and wherein, for at least a part of a period of time for which the electric charges produced by the second photoelectric conversion portion are accumulated in the electric charge accumulating portion, the drive portion causes the voltage of the variable voltage power source to be lower than that when a signal based on the electric charges accumulated in the electric charge accumulating portion is read out; and a signal processing portion configured to process a signal from the solid-state imaging device.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
February 3, 2017
August 18, 2020
Browse 5M+ US patents with plain-English claim translations and AI-generated analysis.