An embodiment is a method including: attaching a first die to a first side of a first component using first electrical connectors, attaching a first side of a second die to first side of the first component using second electrical connectors, attaching a dummy die to the first side of the first component in a scribe line region of the first component, adhering a cover structure to a second side of the second die, and singulating the first component and the dummy die to form a package structure.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A structure comprising: a first side of an interposer bonded to a package substrate; active sides of a first die and a second die bonded to a second side of the interposer, the second side being opposite the first side; a dummy die attached to the second side of the interposer, the dummy die being adjacent to at least one of first die or the second die; and a cover structure attached to backside of the second die, the second die comprising one or more memory dies, the cover structure being thicker than each of the one or more memory dies.
2. The structure of claim 1 , wherein the dummy die is made of silicon.
3. The structure of claim 1 , wherein the cover structure is further adhered to a back side of the first die and to a top surface of the dummy die.
4. The structure of claim 1 , wherein the second side of the interposer further comprises a redistribution structure, the active sides of the first die and the second die being bonded to the redistribution structure.
5. The structure of claim 4 , wherein the interposer further comprises through vias extending through a bulk substrate of the interposer, the through vias being electrically coupled to the redistribution structure.
6. The structure of claim 5 further comprising: a substrate bonded to the first side of the interposer by conductive connectors, the conductive connectors being electrically coupled to the through vias; and a surface mount device bonded to the substrate.
7. The structure of claim 1 , wherein the first die comprises one or more logic dies.
8. The structure of claim 1 further comprising: an underfill between the first die and the interposer and the second die and the interposer.
9. The structure of claim 8 further comprising: an encapsulant adjacent the second die, the encapsulant contacting a sidewall of the second die and a sidewall of the underfill.
10. A package comprising: a first die bonded to a first side of a first interposer using first electrical connectors; a stack of memory dies bonded to the first side of the first interposer using second electrical connectors, the stack of memory dies being adjacent the first die, the stack of memory dies comprising a top die, the top die being the furthest die in the stack of memory dies from the first side of the first interposer, the top die having a thickness greater than a thickness of each of the other dies in the stack of memory dies; and a package substrate bonded to a second side of the first interposer, the second side being opposite the first side.
11. The package of claim 10 , wherein the top die has a thickness greater than or equal to 120 μM.
12. The package of claim 10 , wherein the top die is a memory die.
13. The package of claim 10 , wherein the top die is a dummy die.
14. The package of claim 10 further comprising: an underfill between the first die and the first interposer and the stack of memory dies and the first interposer.
15. A structure comprising: active sides of a first die and a second die bonded to a first side of an interposer; a dummy die attached to the first side of the interposer, the dummy die being adjacent to at least one of first die or the second die; a cover structure attached to backsides of the dummy die, the second die, and the first die; and a package substrate bonded to a second side of the interposer, the second side being opposite the first side.
16. The structure of claim 15 , wherein the dummy die is made of silicon.
17. The structure of claim 15 , wherein the cover structure is attached to the backsides of the dummy die, the second die, and the first die by an adhesive layer.
18. The structure of claim 15 , wherein the first side of the interposer further comprises a redistribution structure, the active sides of the first die and the second die being bonded to the redistribution structure.
19. The structure of claim 15 , wherein backside surfaces of the first die, the second die, and the dummy die are at a same level.
20. The structure of claim 15 , wherein the second die comprises one or more memory dies, the cover structure being thicker than each of the one or more memory dies.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
December 10, 2018
September 8, 2020
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