Capacitive loading mode measurement circuit with compensation of measurement errors due to parasitic sensor impedances

1. An impedance measurement circuit for determining a sense current of a guard-sense capacitive sensor operated in loading mode including an electrically conductive sense electrode and an electrically conductive guard electrode proximally arranged and mutually galvanically separated from each other, the impedance measurement circuit including a periodic signal voltage source that is configured to provide a periodic measurement voltage to the guard electrode, a sense current measurement circuit that is configured to determine a current flowing through the sense electrode that is indicative of an unknown impedance and represents a position of an object relative to the sense electrode, a differential amplifier that is configured to sense a complex voltage difference between the sense electrode and the guard electrode, demodulation means that are configured for demodulating an output signal of the differential amplifier and for obtaining, with reference to the periodic measurement voltage, an in-phase component and a quadrature component, a first control loop that is configured to receive the in-phase component as an input signal, and a second control loop that is configured to receive the quadrature component as an input signal, wherein an output signal of the first control loop and an output signal of the second control loop are used to form a complex voltage that serves as a complex reference voltage for the sense current measurement circuit.

2. The impedance measurement circuit as claimed in claim 1 , wherein the first control loop includes a first integrating amplifier that is configured to generate a first error signal with reference to a direct current reference voltage, and the second control loop includes a second integrating amplifier that is configured to generate a second error signal with reference to the direct current reference voltage.

3. The impedance measurement circuit as claimed in claim 2 , wherein the first control loop further includes a first mixer that is configured to multiply the first error signal and the periodic measurement voltage, and the second control loop further includes a second mixer that is configured to multiply the second error signal and a quadrature phase of the periodic measurement voltage.

4. The impedance measurement circuit as claimed in claim 3 , further comprising a summing circuit that is configured for at least summing the output signal of the first control loop and the output signal of the second control loop to form the complex voltage that serves as the complex reference voltage for the sense current measurement circuit.

5. The impedance measurement circuit as claimed in claim 4 , wherein the summing circuit is configured for at least summing the output signal of the first control loop and the output signal of the second control loop and the periodic signal voltage source to form the complex voltage that serves as the complex reference voltage for the sense current measurement circuit.

6. The impedance measurement circuit as claimed in claim 1 , comprising a microcontroller, including a processor unit ( 66 ), a digital data memory unit to which the processor unit ( 66 ) has data access, a microcontroller system clock, a plurality of synchronized pulse width modulation units configured to provide square wave output signals, and wherein the periodic signal voltage source is formed by a pulse generator unit that is configured to weight and to sum output signals of the plurality of synchronized pulse width modulation units having same fundamental signal frequency, and a low-pass filter unit that is connected in series to an output of the pulse generator unit and that is configured to filter the summed output signals for generating the periodic measurement voltage.

7. The impedance measurement circuit as claimed in claim 6 , the microcontroller further including an analog-to-digital converter unit comprising at least one analog-to-digital converter, wherein an output port of the differential amplifier and the periodic measurement voltage are connected to an input port of the at least one analog-to-digital converter, and the processor unit ( 66 ) is configured to emulate the demodulation means, the first control loop and the second control loop on the basis of the digitally converted output signals of the differential amplifier and the periodic measurement voltage by executing a predetermined program code of a software module.

8. The impedance measurement circuit as claimed in claim 1 , wherein the sense electrode is electrically connected to the sense current measurement circuit, the guard electrode is electrically connected to an output port of the periodic signal voltage source, one input port of the differential amplifier is electrically connected to the sense electrode, and one input port of the differential amplifier is electrically connected to the guard electrode.

9. The impedance measurement circuit as claimed in claim 6 , wherein the processor unit is configured to carry out the steps of: demodulating the complex voltage difference between the sense electrode and the guard electrode by mixing the sensed complex voltage difference with the periodic measurement voltage and with a quadrature phase version of the periodic measurement voltage, respectively, and obtaining, with reference to the periodic measurement voltage, an in-phase component and a quadrature component of the sensed complex voltage difference, providing the in-phase component as an input signal to a first control loop and the quadrature component as an input signal to a second control loop, and generating a complex voltage by summing an output signal of the first control loop and an output signal of the second control loop.

10. A method for determining a sense current of a guard-sense capacitive sensor operated in loading mode, the guard-sense capacitive sensor including an electrically conductive sense electrode and an electrically conductive guard electrode proximally arranged and mutually galvanically separated from each other, the method comprising steps of (a) providing a periodic measurement voltage to the guard electrode, (b) sensing a complex voltage difference between the sense electrode and the guard electrode, (c) demodulating the complex voltage difference between the sense electrode and the guard electrode by mixing the sensed complex voltage difference with the periodic measurement voltage and with a quadrature phase version of the periodic measurement voltage, respectively, and obtaining, with reference to the periodic measurement voltage, an in-phase component and a quadrature component of the sensed complex voltage difference, (d) providing the in-phase component as an input signal to a first control loop and the quadrature component as an input signal to a second control loop, (e) generating a complex voltage by summing an output signal of the first control loop and an output signal of the second control loop, and (f) determining a current flowing through the sense electrode with reference to the generated complex voltage.

11. The method as claimed in claim 10 , wherein the step of generating the complex voltage comprises steps of comparing the in-phase component to a direct current reference potential of zero V with a first integrating amplifier and comparing the quadrature component to the direct current reference potential of zero V with a second integrating amplifier, multiplying an output signal of the first integrating amplifier with the periodic measurement voltage with a first mixer and multiplying an output signal of the second integrating amplifier with the quadrature phase version of the periodic measurement voltage with a second mixer, and providing an output of the first mixer and an output of the second mixer to a summing circuit for generating the complex voltage.

12. A non-transitory, computer readable medium for carrying out steps of the method as claimed in claim 10 for determining a sense current of a guard-sense capacitive sensor operated in loading mode, wherein method steps (c) through (e) are stored on the computer readable medium as program code that is executable by a processor unit of the microcontroller.