Display device

1. A display device, comprising: a pixel row including a plurality of pixels arranged in a first direction; a first data line extending along the first direction at a first edge of the pixel row; a second data line extending along the first direction at a second edge of the pixel row, opposite the first edge of the pixel row along a second direction that is perpendicular to the first direction; a first pixel connected to the first data line; and a second pixel adjacent to the first pixel in the first direction and connected to the second data line, wherein each of the first pixel and the second pixel includes a light emitting diode, a first transistor to transmit a driving current to the light emitting diode, a second transistor to transmit a data signal to the first transistor, a third transistor to transmit the data signal having a compensated threshold voltage to a gate electrode of the first transistor, and a fourth transistor to transmit an initialization voltage signal to the gate electrode of the first transistor, the first transistor and the second transistor of each of the first pixel and the second pixel are PMOS transistors, and the third transistor and the fourth transistor of each of the first pixel and the second pixel are NMOS transistors.

2. The display device as claimed in claim 1 , wherein: the first data line is not connected to the second pixel, and the second data line is not connected to the first pixel.

3. The display device as claimed in claim 2 , wherein time taken the data signal to be provided from the first data line to the first pixel is different from time taken the data signal to be provided from the second data line to the second pixel.

4. The display device as claimed in claim 1 , wherein: a semiconductor layer of the PMOS transistors includes polycrystalline silicon, and a semiconductor layer of the NMOS transistors includes an oxide semiconductor.

5. The display device as claimed in claim 4 , wherein a source or drain electrode of the NMOS transistors is directly on the semiconductor layer of the NMOS transistors.

6. The display device as claimed in claim 1 , wherein an anode electrode of the light emitting diode covers a semiconductor layer of the third transistor and a semiconductor layer of the fourth transistor.

7. The display device as claimed in claim 1 , further comprising: a first scan line connected to a gate electrode of the second transistor and a gate electrode of the third transistor; and a second scan line connected to a gate electrode of the fourth transistor.

8. The display device as claimed in claim 7 , wherein the first scan line and the second scan line extend in the second direction.

9. The display device as claimed in claim 1 , wherein each of the first pixel and the second pixel further includes a power supply voltage line to provide a power supply voltage to each of the first pixel and the second pixel.

10. The display device as claimed in claim 9 , wherein the power supply voltage line is formed to cover a semiconductor layer of the third transistor and a semiconductor layer of the fourth transistor.

11. A display device, comprising: a substrate on which a plurality of pixel regions is defined; a lower semiconductor layer on the substrate; a first conductive layer on the lower semiconductor layer; a second conductive layer on the first conductive layer; an upper semiconductor layer on the second conductive layer; a third conductive layer on the upper semiconductor layer; and a fourth conductive layer on the third conductive layer, wherein the lower semiconductor layer is a semiconductor layer of a PMOS transistor, the upper semiconductor layer is a semiconductor layer of an NMOS transistor, and the lower semiconductor layer, the first conductive layer, the second conductive layer, the upper semiconductor layer, the third conductive layer, and the fourth conductive layer are in the respective pixel regions.

12. The display device as claimed in claim 11 , wherein: the lower semiconductor layer includes an oxide semiconductor, and the upper semiconductor layer includes polycrystalline silicon.

13. The display device as claimed in claim 12 , wherein the lower semiconductor layer does not overlap the upper semiconductor layer in a thickness direction.

14. The display device as claimed in claim 11 , wherein: the first conductive layer and the second conductive layer include molybdenum, and the third conductive layer and the fourth conductive layer include aluminum.

15. The display device as claimed in claim 11 , wherein, in each of the pixel regions, the fourth conductive layer includes a first data line and a second data line.

16. The display device as claimed in claim 15 , wherein the first data line and the second data line are spaced apart from each other.

17. The display device as claimed in claim 15 , further comprising a pixel electrode electrically connected to any one of the first data line and the second data line.

18. The display device as claimed in claim 17 , wherein the pixel electrode is not electrically connected to one of the first data line and the second data line.

19. The display device as claimed in claim 11 , wherein the third conductive layer is directly on the upper semiconductor layer.

20. The display device as claimed in claim 11 , wherein the third conductive layer includes: a source or drain electrode electrically connected to the upper semiconductor layer; and a source or drain electrode electrically connected to the lower semiconductor layer.