Power converter fault detection by counting request pulses

1. A method, comprising: responsive to comparing an output signal representative of an output voltage of an output of a power converter that receives energy, to a first reference signal, generating a first constant voltage signal; responsive to the first constant voltage signal, generating a request signal and a select signal representative of the output of the power converter; responsive to the request signal, transferring energy from an input of the power converter to the output of the power converter by controlling a switching of a power switch; responsive to the first constant voltage signal and the request signal, incrementing a fault threshold count in response to consecutive request signals; responsive to the fault threshold count exceeding a threshold number, generating a first fault signal indicative of a power limit fault; and responsive to the first fault signal, ceasing operation of the power converter by ceasing the transferring of energy from the input of the power converter to the output of the power converter.

2. The method of claim 1 , further responsive to the fault threshold count to indicate a short circuit fault in the power converter.

3. The method of claim 1 , further comprising, responsive to a rate of the consecutive request signals and the select signal, generating the first fault signal to indicate an overload fault in the power converter.

4. A controller for a multiple output power converter, comprising: an error amplifier configured to generate an error signal based on a difference between an output signal of a multiple output power converter and a reference signal; a switch request circuit configured to generate a request signal in response to the error signal, the switch request circuit further configured to generate a select signal representative of which output of the multiple output power converter receives energy, the switch request circuit further configured to control a switching of a power switch of the multiple output power converter to transfer energy from an input of the multiple output power converter to an output of the multiple output power converter; and a power limit fault circuit comprising at least one counter and configured to receive the request signal and the error signal, the power limit fault circuit further configured to generate a first fault signal for ceasing operation when the at least one counter is incremented by consecutive request signals in response to an output overload or short circuit.

5. The controller of claim 4 , wherein each output of the multiple output power converter is coupled to a corresponding power limit fault circuit.

6. The controller of claim 4 , wherein the controller is a secondary controller that communicates to a primary controller that is galvanically isolated between the input of the multiple output power converter and the output of the multiple output power converter.

7. The controller of claim 6 , wherein the request signal is configured to be received by the primary controller through a communication link.

8. The controller of claim 4 , wherein the switch request circuit is further configured to receive the error signal to determine a switching frequency or duty cycle of the power switch.

9. The controller of claim 4 , wherein the switch request circuit is further configured to generate a synchronous drive signal to control switching of a synchronous rectifier coupled to a first output of the multiple output power converter.

10. The controller of claim 4 , wherein the switch request circuit is further configured to generate a first secondary drive signal to control switching of a first secondary switch coupled to a first output of the multiple output power converter.

11. The controller of claim 4 , wherein the at least one counter comprises a first counter and a second counter.

12. The controller of claim 11 , wherein the power limit fault circuit comprises: a short circuit detection circuit, comprising: the first counter configured to be reset in response to the error signal, the first counter further configured to increment a first counter output in response to the request signal and the select signal; and a first threshold detect circuit configured to receive the first counter output from the first counter, the first threshold detect circuit configured to output a first threshold detect signal in response to a first threshold number of consecutive request pulses received between pulses of the error signal; an overload detection circuit, including comprising: the second counter configured to increment a second counter output in response to the request signal and the select signal, the second counter further configured to decrement an input of the second counter in response to an output of the second counter and a decay signal; a second threshold detect circuit configured to receive the second counter output from the second counter, the second threshold detect circuit further configured to output a second threshold detect signal in response to an increased rate of consecutive request pulses occurring in the request signal exceeding a second threshold; and a first logic gate configured to generate the first fault signal in response to the first threshold detect signal or the second threshold detect signal.

13. The controller of claim 12 , wherein the overload detection circuit further comprises: a third logic gate configured to receive the second counter output; and a fourth logic gate configured to receive an output of the third logic gate and the decay signal, the second counter further configured to decrement an input of the second counter in response to an output of the fourth logic gate and the decay signal.

14. The controller of claim 12 , wherein the overload detection circuit further comprises a decay circuit configured to generate the decay signal having a fixed decay frequency.