Patentable/Patents/US-10838816
US-10838816

Detecting and sparing of optical PCIE cable channel attached IO drawer

PublishedNovember 17, 2020
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

A method, system and computer program product are provided for detecting state and sparing of optical Peripheral Component Interconnect Express (PCI-Express or PCIE) cable channels attached to an IO drawer. System firmware is provided for implementing health check functions and state detection and sparing functions. One or more optical cables are connected between a host bridge and an PCIE enclosure, each optical cable includes one or more spare optical channels. An identified failed optical channel is rerouted to the spare optical channel.

Patent Claims
20 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A method for detecting state and sparing of optical Peripheral Component Interconnect Express (PCI-Express or PCIE) cable channels attached to an IO drawer in a computer system, said computer system including a processor, a PCIE host bridge (PHB), said PHB connected to said processor and a PCIE link, said method comprising: providing system firmware for implementing health check functions and detecting state and sparing functions; providing at least one optical cable coupled between the PHB and a PCIE enclosure for PCIE bidirectional traffic and sideband communication, each optical cable including at least one spare optical channel; starting a health check; identifying, based on the health check, a degraded PCIE link; responsive to identifying the degraded PCIE link, interrogating predefined components; determining, based on the interrogating, that a faulted optical channel exists; identifying the faulted optical channel; and rerouting the faulted optical channel to a spare optical channel using lane sparing hardware on both ends of said at least one optical cable.

2

2. The method as recited in claim 1 , includes providing each optical cable with a plurality of optical channels for said PCIE bidirectional traffic and sideband communication and said plurality of optical channels including said at least one spare optical channel.

3

3. The method as recited in claim 1 , wherein identifying a faulted optical channel and rerouting the faulted optical channel to a spare optical channel includes providing said lane sparing hardware on both ends of each optical cable.

4

4. The method as recited in claim 3 , wherein providing said lane sparing hardware includes providing a lane sparing hardware control device used for rerouting the faulted optical channel to a spare optical channel.

5

5. The method as recited in claim 4 , includes providing a set of PCIE lane multiplexers and said lane sparing hardware control device being programmed by said system firmware implementing health check functions and detecting state and sparing functions.

6

6. The method as recited in claim 5 , includes providing a port expander device used to control said set of PCIE lane multiplexers, said port expander device being programmed by said system firmware for changing input to output mapping of the PCIE lane multiplexers for rerouting the faulted optical channel to the spare optical channel.

7

7. The method as recited in claim 6 , includes controlling said port expander using sideband signals.

8

8. The method as recited in claim 1 , wherein starting a health check for identifying a degraded PCIE link includes providing periodic polling and interrupts from PCIE errors.

9

9. The method as recited in claim 1 , wherein using lane sparing hardware on both ends of said at least one optical cable includes reading retimer registers, and interrogating optical transmitters to identify a faulted optical channel.

10

10. A computer system for detecting state and sparing of optical Peripheral Component Interconnect Express (PCI-Express or PCIE) cable channels attached to an I 0 drawer, comprising: a processor; a PCIE host bridge (PHB), the PHB connected to the processor and a PCIE link; one or more optical cables connected to the PCIE link and coupled between the PHB and a PCIE enclosure for PCIE bidirectional traffic and sideband communication, each optical cable including: at least one spare optical channel; and lane sparing hardware on both ends of the optical cable; and system firmware for implementing health check functions and detecting state and sparing functions; and wherein the processor is configured to use the system firmware for: starting a health check; identifying, based on the health check, a degraded PCIE link; responsive to identifying the degraded PCIE link, interrogating predefined components; determining, based on the interrogating, that a faulted optical channel exists; identifying the faulted optical channel; and rerouting the faulted optical channel to a spare optical channel using the lane sparing hardware on both ends of at least one of the one or more optical cables.

11

11. The computer system of claim 10 , wherein each of the one or more optical cables further includes a plurality of optical channels for the PCIE bidirectional traffic and sideband communication.

12

12. The computer system of claim 10 , wherein the lane sparing hardware includes a lane sparing hardware control device used to reroute the failed optical channel to the spare optical channel.

13

13. The computer system of claim 12 , wherein: the lane sparing hardware includes a set of PCIE multiplexers; and the lane sparing control device is used to control the set of PCIE multiplexers.

14

14. The computer system of claim 13 , further comprising a port expander device used to control the set of PCIE lane multiplexers, wherein the port expander device is programmed by the system firmware for changing input to output mapping of the PCIE lane multiplexers for rerouting the faulted optical channel to the spare optical channel.

15

15. The computer system of claim 10 , wherein starting a health check includes providing periodic polling and interrupts from PCIE errors.

16

16. The computer system of claim 10 , wherein using lane sparing hardware on both ends of the at least one optical cable includes reading retimer registers and interrogating optical transmitters to identify the faulted optical channel.

17

17. A computer program product comprising a computer readable storage medium having program instructions embodied therewith, the program instructions executable by a processor to cause the processor to perform a method for detecting state and sparing of optical Peripheral Component Interconnect Express (PCI-Express or PCIE) cable channels attached to an I 0 drawer in a computer system, the computer system including a PCIE host bridge (PHB), the PHB connected to the processor and a PCIE link, the method comprising: starting a health check; identifying, based on the health check, a degraded PCIE link; responsive to identifying the degraded PCIE link, interrogating predefined components; determining, based on the interrogating, that a faulted optical channel exists; and identifying the faulted optical channel and rerouting the faulted optical channel to a spare optical channel using lane sparing hardware on both ends of one or more optical cables.

18

18. The computer program product of claim 17 , further comprising using a port expander device to control a set of PCIE lane multiplexers for changing input to output mapping of the PCIE lane multiplexers for rerouting the faulted optical channel to the spare optical channel.

19

19. The computer program product of claim 17 , wherein starting a health check includes providing periodic polling and interrupts from PCIE errors.

20

20. The computer program product of claim 17 , wherein using lane sparing hardware on both ends of the one or more optical cables includes reading retimer registers and interrogating optical transmitters to identify the faulted optical channel.

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Patent Metadata

Filing Date

November 29, 2017

Publication Date

November 17, 2020

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Cite as: Patentable. “Detecting and sparing of optical PCIE cable channel attached IO drawer” (US-10838816). https://patentable.app/patents/US-10838816

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