Semiconductor package and method of forming the same

1. A semiconductor package, comprising: at least two conductors respectively configured as an input/output (I/O) terminal of the semiconductor package, wherein the at least two conductors is respectively electrically connected to a solder bump at one end and a conductive trace at the other end; a first dielectric partially surrounding the at least two conductors; a capacitor substantially under the first dielectric, wherein the capacitor includes a first electrode extending along a first direction and electrically connected with one of the at least two conductors, and a second electrode extending along a second direction opposite to the first direction and electrically connected to the other one of the at least two conductors, wherein the capacitor contacts with the at least two conductors at sidewall surfaces between the two ends in a third direction perpendicular to the first direction; and a second dielectric over and lining along the first dielectric and top portions of the at least two conductors, wherein the second dielectric provides a compressive stress to the first dielectric.

2. The semiconductor package of claim 1 , wherein the capacitor further includes a dielectric layer between the first electrode and the second electrode, extending along the first direction and contacting with one of the at least two conductors.

3. The semiconductor package of claim 1 , wherein the first electrode and the second electrode respectively contacts with one of the at least two conductors.

4. The semiconductor package of claim 1 , wherein a shortest distance between the second dielectric and the capacitor measured in the third direction is about 3 kÅ to 8 kÅ.

5. The semiconductor package of claim 1 , wherein the capacitor is in a third dielectric, and the third dielectric partially surrounds the at least two conductors.

6. The semiconductor package of claim 5 , wherein the first dielectric is between the second dielectric and the third dielectric.

7. The semiconductor package of claim 1 , wherein bottom surfaces of the at least two conductors are substantially on a same level.

8. A semiconductor package, comprising: a capacitor, comprising: a lower electrode plate electrically connected to a first conductor; an upper electrode plate electrically connected to a second conductor; and a dielectric layer between the lower electrode plate and the upper electrode plate, wherein the dielectric layer contacts with sidewall surfaces of the first conductor and the second conductor; and a nitride containing dielectric over and adjacent to the capacitor, wherein a portion of the first conductor and a portion of the second conductor are respectively exposed from the nitride containing dielectric, wherein the exposed portions form terminals for external electrical connection.

9. The semiconductor package of claim 8 , wherein the lower electrode plate and the upper electrode plate respectively contacts with the first conductor and the second conductor.

10. The semiconductor package of claim 8 , wherein a shortest distance between the nitride containing dielectric and the capacitor is about 1 kÅ to 3 kÅ.

11. The semiconductor package of claim 8 , wherein the nitride containing dielectric includes a SiN layer, and a dielectric below the SiN layer.

12. The semiconductor package of claim 8 , wherein the capacitor is between the first conductor and the second conductor in a top view.

13. The semiconductor package of claim 8 , wherein the first conductor and the second conductor are respectively electrically connected to a solder bump at one end and a conductive trace at the other end, and the capacitor respectively contacts with the first conductor and the second conductor at the sidewall surfaces between the two ends.

14. The semiconductor package of claim 8 , further comprising: an oxide containing dielectric disposed over the capacitor and surrounding the first conductor and the second conductor, wherein the portion of the first conductor and the portion of the second conductor are respectively exposed from the oxide containing dielectric.

15. A semiconductor package, comprising: a dielectric; a first conductor disposed over and partially surrounded by the dielectric; a second conductor disposed adjacent to the first conductor, disposed over and partially surrounded by the dielectric; a capacitor disposed between the first conductor and the second conductor, surrounded by the dielectric, and electrically connected to the first conductor and the second conductor; an oxide containing dielectric disposed over the dielectric and the capacitor and surrounding the first conductor and the second conductor; and a nitride containing dielectric disposed conformal to the oxide containing dielectric, wherein a portion of the first conductor and a portion of the second conductor are exposed from the oxide containing dielectric and the nitride containing dielectric.

16. The semiconductor package of claim 15 , wherein the capacitor includes a first electrode contacting the first conductor and a second electrode disposed under the first electrode and contacting the second conductor.

17. The semiconductor package of claim 16 , wherein the first electrode is isolated from the second conductor, and the second electrode is isolated from the first conductor.

18. The semiconductor package of claim 15 , wherein at least a portion of the nitride containing dielectric is disposed between the first conductor and the second conductor.

19. The semiconductor package of claim 15 , wherein a dielectric constant of the nitride containing dielectric is substantially higher than a dielectric constant of the oxide containing dielectric.

20. The semiconductor package of claim 15 , wherein a dielectric constant of the nitride containing dielectric is about 7.0-9.0.