Patentable/Patents/US-10884761
US-10884761

Best performance delivery in heterogeneous computing unit environment

PublishedJanuary 5, 2021
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

An apparatus for selecting an efficient processor includes a comparison module that compares performance characteristics of a plurality of processors available for execution of a function, where each performance characteristic varies as a function of function size. The apparatus includes a selection module that selects, based on a size of the function, a processor from the plurality of processors with a best performance for execution of the function, and an execution module that executes the function on the selected processor.

Patent Claims
16 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A method comprising: determining a performance characteristic of each of a main processor and a plurality of alternate processors based on function execution data from a plurality of previously executed functions; tracking a context for each previously executed function executed on the main processor and on a processor of the alternate plurality of processors; comparing performance characteristics of the main processor and the plurality of the alternate processors available for execution of a function, wherein the compared performance characteristics are derived from the plurality of previously executed functions and comprise a similar context to the function, and wherein each performance characteristic varies as a function of function size, the performance characteristics comprising an amount of time to execute the function on a particular processor of the main processor and the plurality of alternate processors; selecting, based on a size of the function; a processor from the main processor and the plurality of alternate processors with a best performance for execution of the function, wherein the selected processor has a lowest execution time for the function; and executing the function on the selected processor.

2

2. The method of claim 1 , wherein determining the performance characteristic of the main processor and each of the plurality of alternate processors further comprises: calculating performance of an executed function executed on a processor of the main processor or a processor of the plurality of alternate processors; and correlating a size of each executed function to performance during execution of the function to determine a performance characteristic of the processor of the main processor or a processor of the plurality of alternate processors.

3

3. The method of claim 1 , wherein determining the performance characteristic of the main processor and each of the plurality of alternate processors is based on function execution data from previously executed functions and: information supplied with the function; and/or information from a vendor associated with the main processor or a processor of the plurality of alternate processors.

4

4. The method of claim 1 , wherein determining the performance characteristic of the main processor and each of the plurality of alternate processors further comprises updating an initial performance characteristic of a processor of the main processor or a processor of the plurality of alternate processors based on the function execution data from previously executed functions.

5

5. A program product comprising a non-transitory computer readable storage medium that stores code executable by a processor, the executable code comprising code to perform: determining a performance characteristic of each of a main processor and a plurality of alternate processors based on function execution data from a plurality of previously executed functions; tracking a context for each previously executed function executed on the main processor and on a processor of the plurality of alternate processors; comparing performance characteristics of the main processor and the plurality of the alternate processors available for execution of a function, wherein the compared performance characteristics are derived from the plurality of previously executed functions and comprise a similar context to the function, and wherein each performance characteristic varies as a function of function size, the performance characteristics comprising an amount of time to execute the function on a particular processor of the main processor and the plurality of alternate processors; selecting, based on a size of the function; a processor from the main processor and the plurality of alternate processors with a best performance for execution of the function, wherein the selected processor has a lowest execution time for the function; and executing the function on the selected processor.

6

6. The program product of claim 5 , wherein determining the performance characteristic of each of the plurality of processors further comprises: calculating performance of an executed function executed on a processor of the main processor or a processor of the plurality of alternate processors; and correlating a size of each executed function to performance during execution of the function to determine a performance characteristic of the processor of the main processor or a processor of the plurality of alternate processors.

7

7. The program product of claim 5 , determining the performance characteristic of the main processor and each of the plurality of alternate processors is based on function execution data from previously executed functions and: information supplied with the function; and/or information from a vendor associated with the main processor or a processor of the plurality of alternate processors.

8

8. The program product of claim 5 , wherein determining the performance characteristic of the main processor and each of the plurality of alternate processors further comprises updating an initial performance characteristic of a processor of the main processor or a processor of the plurality of alternate processors based on the function execution data from previously executed functions.

9

9. The program product of claim 5 , further comprising selecting multiple processors from the main processor and the plurality of alternate processors with similar best performance characteristics, based on the size of the function, for execution of the function and executing the function on the multiple selected processors.

10

10. The program product of claim 5 , further comprising, in response to selecting a processor for execution of the function, formatting the function for execution on the selected processor, wherein the function is formatted for a central-processing unit (“CPU”) prior to formatting for the selected processor.

11

11. The program product of claim 5 , wherein the performance characteristics of the plurality of alternate processors comprise one or more of speed of execution, energy efficiency, and cost of execution of a functions of various sizes.

12

12. The program product of claim 5 , wherein each of the plurality of alternate processors comprises at least one field-programmable gate array (“FPGA”) and at least one graphics processing unit (“GPU”).

13

13. The method of claim 1 , further comprising selecting multiple processors from the main processor and the plurality of alternate processors with similar best performance characteristics, based on the size of the function, for execution of the function and executing the function on the multiple selected processors.

14

14. The method of claim 1 , further comprising, in response to selecting a processor for execution of the function, formatting the function for execution on the selected processor, wherein the function is formatted for a central-processing unit (“CPU”) prior to formatting for the selected processor.

15

15. The method of claim 1 , wherein the performance characteristics of the plurality of alternate processors comprise one or more of speed of execution, energy efficiency, and cost of execution of a functions of various sizes.

16

16. The method of claim 1 , wherein each of the plurality of alternate processors comprises at least one field-programmable gate array (“FPGA”) and at least one graphics processing unit (“GPU”).

Classification Codes (CPC)

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Patent Metadata

Filing Date

March 22, 2016

Publication Date

January 5, 2021

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Cite as: Patentable. “Best performance delivery in heterogeneous computing unit environment” (US-10884761). https://patentable.app/patents/US-10884761

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