Patentable/Patents/US-10910035
US-10910035

Dynamic semiconductor memory device and memory system with temperature sensor

PublishedFebruary 2, 2021
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

Provided are a dynamic semiconductor memory device and a memory system including the same. The dynamic semiconductor memory device includes a memory cell array including a first memory cell array block including a plurality of first dynamic memory cells connected between a plurality of first word lines and a plurality of first bit lines, a second memory cell array block including a plurality of second dynamic memory cells connected between a plurality of second word lines and a plurality of second bit lines, and a sense amplification block including a plurality of sense amplifiers configured to amplify voltages of the plurality of first bit lines and voltages of the plurality of second bit lines to a first sensing supply voltage or at least one second sensing voltage higher than the first sensing supply voltage; a temperature sensor unit configured to sense a temperature and generate a temperature sensing signal; and a voltage generator configured to generate the first sensing supply voltage or the at least one second sensing supply voltage in response to the temperature sensing signal and to apply the first sensing supply voltage or the at least one second sensing supply voltage to the memory cell array and to apply a sensing ground voltage to the memory cell array.

Patent Claims
20 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A dynamic semiconductor memory device comprising: a memory cell array comprising: a first memory cell array block comprising a plurality of first dynamic memory cells connected between a plurality of first word lines and a plurality of first bit lines; a second memory cell array block comprising a plurality of second dynamic memory cells connected between a plurality of second word lines and a plurality of second bit lines; and a sense amplification block comprising a plurality of sense amplifiers configured to amplify voltages of the plurality of first bit lines and voltages of the plurality of second bit lines to a first sensing supply voltage or at least one second sensing supply voltage higher than the first sensing supply voltage during a sense amplification operation; a temperature sensor unit configured to sense a temperature and generate a temperature sensing signal; and a voltage generator configured to generate the first sensing supply voltage or the at least one second sensing supply voltage in response to the temperature sensing signal and to apply the first sensing supply voltage or the at least one second sensing supply voltage to the memory cell array and to apply a sensing ground voltage to the memory cell array.

2

2. The dynamic semiconductor memory device of claim 1 , wherein the temperature sensor unit is further configured to generate the temperature sensing signal having a first state when the temperature does not exceed a specific temperature and to generate the temperature sensing signal having at least one second state different from the first state when the temperature exceeds the specific temperature, and the voltage generator is further configured to generate the first sensing supply voltage in response to the temperature sensing signal having the first state and to generate the at least one second sensing supply voltage in response to the temperature sensing signal having the at least one second state.

3

3. The dynamic semiconductor memory device of claim 2 , wherein the temperature sensor unit comprises: a temperature sensor configured to sense the temperature and generate a temperature signal; an analog-to-digital converter configured to receive the temperature signal and to convert the temperature signal from an analog signal into a digital signal; and a temperature sensing signal generator configured to receive the digital signal and to generate the temperature sensing signal in response to the digital signal.

4

4. The dynamic semiconductor memory device of claim 3 , wherein the voltage generator comprises: a reference voltage generator configured to receive an external supply voltage and to generate a first reference voltage and at least one second reference voltage higher than the first reference voltage; a switch configured to generate the first reference voltage or the at least one second reference voltage as a reference voltage in response to the temperature sensing signal; a comparator configured to compare the reference voltage with the first sensing supply voltage or the at least one second sensing supply voltage and to generate a driving signal when the first sensing supply voltage or the at least one second sensing supply voltage is lower than the reference voltage; and a driver configured to drive the first sensing supply voltage or the at least one second sensing supply voltage in response to the driving signal.

5

5. The dynamic semiconductor memory device of claim 1 , further comprising: a command decoder and address generator configured to receive a command and address from a source external to the dynamic semiconductor memory device, to generate a mode set command by decoding a command signal included in the command and address, and to generate a mode set code from an address signal included in the command and address; and a mode set register configured to generate a temperature sensor enable signal in response to the mode set code, and wherein the temperature sensor unit is further configured to sense the temperature and generate the temperature sensing signal in response to the temperature sensor enable signal.

6

6. The dynamic semiconductor memory device of claim 1 , further comprising a command decoder and address generator configured to receive a command and address from a source external to the dynamic semiconductor memory device and to generate a refresh command, a write command, or a read command by decoding a command signal included in the command and address, and wherein the temperature sensor unit is further configured to sense the temperature and generate the temperature sensing signal in response to the refresh command, the write command, or the read command.

7

7. The dynamic semiconductor memory device of claim 6 , wherein the sense amplification block comprises: precharge circuits configured to precharge the plurality of first bit lines and the plurality of second bit lines during a precharge operation; and sense amplifiers, each of which is connected between a corresponding one of the plurality of first bit lines and a corresponding one of the plurality of second bit lines, and is configured to amplify a voltage of the corresponding one of the plurality of first bit lines and a voltage of the corresponding one of the plurality of second bit lines to the first sensing supply voltage or the at least one second sensing supply voltage when at least one word line among the plurality of first word lines and the plurality of second word lines is selected during the sense amplification operation performed in response to the refresh command, the write command, or the read command.

8

8. A dynamic semiconductor memory device comprising: a memory cell array comprising: a plurality of dynamic memory cells connected between a plurality of word lines and a plurality of bit lines; and a plurality of sense amplifiers configured to amplify data of the plurality of bit lines; a temperature sensor unit configured to sense a temperature and to generate a temperature sensing signal; and a voltage generator configured to generate a first sensing supply voltage or at least one second sensing supply voltage higher than the first sensing supply voltage in response to the temperature sensing signal and to apply the first sensing supply voltage or the at least one second sensing supply voltage to the memory cell array and to apply a sensing ground voltage to the memory cell array, wherein the plurality of sense amplifiers are further configured to amplify voltages of bit lines corresponding to dynamic memory cells connected to at least one word line selected from among the plurality of word lines to either the first sensing supply voltage or the at least one second sensing supply voltage during a sense amplification operation.

9

9. The dynamic semiconductor memory device of claim 8 , wherein the temperature sensor unit is further configured to generate the temperature sensing signal having a first state when the temperature does not exceed a specific temperature and to generate the temperature sensing signal having at least one second state different from the first state when the temperature exceeds the specific temperature, and the voltage generator is further configured to generate the first sensing supply voltage in response to the temperature sensing signal having the first state and to generate the at least one second sensing supply voltage in response to the temperature sensing signal having the at least one second state.

10

10. The dynamic semiconductor memory device of claim 9 , wherein the temperature sensor unit comprises: a temperature sensor configured to sense the temperature and generate a temperature signal; an analog-to-digital converter configured to receive the temperature signal and to convert the temperature signal from an analog signal into a digital signal; and a temperature sensing signal generator configured to receive the digital signal and to generate the temperature sensing signal in response to the digital signal.

11

11. The dynamic semiconductor memory device of claim 10 , wherein the voltage generator comprises: a reference voltage generator configured to receive an external supply voltage and to generate a first reference voltage and at least one second reference voltage higher than the first reference voltage; a switch configured to generate the first reference voltage or the at least one second reference voltage as a reference voltage in response to the temperature sensing signal; a comparator configured to compare the reference voltage with the first sensing supply voltage or the at least one second sensing supply voltage and to generate a driving signal when the first sensing supply voltage or the at least one second sensing supply voltage is lower than the reference voltage; and a driver configured to drive the first sensing supply voltage or the at least one second sensing supply voltage in response to the driving signal.

12

12. The dynamic semiconductor memory device of claim 8 , further comprising: a command decoder and address generator configured to receive a command and address from a source external to the dynamic semiconductor memory device, to generate a mode set command by decoding a command signal included in the command and address and to generate a mode set code from an address signal included in the command and address; and a mode set register configured to generate a temperature sensor enable signal in response to the mode set code, and wherein the temperature sensor unit is further configured to sense the temperature and to generate the temperature sensing signal in response to the temperature sensor enable signal.

13

13. The dynamic semiconductor memory device of claim 8 , further comprising a command decoder and address generator configured to receive a command and address from a source external to the dynamic semiconductor memory device and to generate a refresh command, a write command, or a read command by decoding a command signal included in the command and address, and wherein the temperature sensor unit is further configured to sense the temperature and to generate the temperature sensing signal in response to the refresh command, the write command, or the read command.

14

14. The dynamic semiconductor memory device of claim 13 , wherein the sense amplification operation is performed in response to the refresh command, the write command, or the read command.

15

15. A memory system comprising: a controller configured to transmit a command and address and to transmit or receive data; and a dynamic memory configured to receive the command and address and to transmit or receive the data, wherein the dynamic memory comprises: a memory cell array comprising: a plurality of dynamic memory cells connected between a plurality of word lines and a plurality of bit lines; and a plurality of sense amplifiers configured to amplify data of the plurality of bit lines; a temperature sensor unit configured to sense a temperature and to generate a temperature sensing signal; and a voltage generator configured to generate a first sensing supply voltage or at least one second sensing supply voltage higher than the first sensing supply voltage in response to the temperature sensing signal and to apply the first sensing supply voltage or the at least one second sensing supply voltage to the memory cell array and to apply a sensing ground voltage to the memory cell array, and wherein the plurality of sense amplifiers amplify voltages of bit lines corresponding to dynamic memory cells connected to at least one word line selected from among the plurality of word lines to either the first sensing supply voltage or the at least one second sensing supply voltage during a sense amplification operation.

16

16. The memory system of claim 15 , wherein the temperature sensor unit is further configured to generate the temperature sensing signal having a first state when the temperature does not exceed a specific temperature and to generate the temperature sensing signal having at least one second state different from the first state when the temperature exceeds the specific temperature, and the voltage generator is further configured to generate the first sensing supply voltage in response to the temperature sensing signal having the first state and generates the at least one second sensing supply voltage in response to the temperature sensing signal having the at least one second state.

17

17. The memory system of claim 16 , wherein the temperature sensor unit comprises: a temperature sensor configured to sense the temperature and to generate a temperature signal; an analog-to-digital converter configured to receive the temperature signal, and to convert the temperature signal from an analog signal into a digital signal; and a temperature sensing signal generator configured to receive the digital signal and to generate the temperature sensing signal.

18

18. The memory system of claim 17 , wherein the voltage generator comprises: a reference voltage generator configured to receive an external supply voltage and to generate a first reference voltage and at least one second reference voltage higher than the first reference voltage; a switch configured to generate the first reference voltage or the at least one second reference voltage as a reference voltage in response to the temperature sensing signal; a comparator configured to compare the reference voltage with the first sensing supply voltage or the at least one the second sensing supply voltage and to generate a driving signal when the first sensing supply voltage or the at least one second sensing supply voltage is lower than the reference voltage; and a driver configured to drive the first sensing supply voltage or the at least one second sensing supply voltage in response to the driving signal.

19

19. The memory system of claim 15 , wherein the dynamic memory further comprises a command decoder and address generator configured to generate a refresh command, a write command, or a read command by decoding a command signal included in the command and address, and the temperature sensor unit is further configured to sense the temperature and to generate the temperature sensing signal in response to the refresh command, the write command, or the read command.

20

20. The memory system of claim 19 , wherein the sense amplification operation is performed in response to the refresh command, the write command, or the read command.

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Patent Metadata

Filing Date

May 21, 2019

Publication Date

February 2, 2021

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Cite as: Patentable. “Dynamic semiconductor memory device and memory system with temperature sensor” (US-10910035). https://patentable.app/patents/US-10910035

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