The present disclosure involves a two stage inverter, a system for electrical power conversation, and a method of converting electrical power using silicon carbide (SiC) metal-oxide-semiconductor field-effect transistors (MOSFETs). One example implementation includes using two or more SiC MOSFETs in series with each MOSFET having a gate terminal for triggering a state switch between an on (conducting) and off (non-conducting) state of the MOSFET. An AC terminal is connected between the series SiC MOSFETS, and the series SiC MOSFETs are connected across a DC bus and in parallel with one or more capacitors.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A bidirectional, two level inverter for a motor and/or generator, comprising: a silicon carbide (SiC) half-bridge module, the SiC half-bridge module comprising: two or more SiC metal-oxide-semiconductor field-effect transistors (MOSFETs) connected in series, wherein each SiC MOSFET has a gate terminal; an alternating current (AC) motor and/or generator terminal connected between the SiC MOSFETs; and a direct current (DC) bus connected across the two or more SiC MOSFETs, wherein the DC bus comprises: a positive conducting plate that forms a first conductive path; a negative conducting plate that forms a second conducting path, wherein the positive conducting plate and the negative conducting plate are shaped to nest together with the first and second conducting paths adjacent to each other; and a capacitor connected across the DC bus and in parallel with the SiC half-bridge module.
2. The inverter of claim 1 , wherein the DC bus voltage is at least 3,000V, and wherein each SiC MOSFET comprises a drain terminal and a source terminal and are rated for a drain to source voltage of at least 10,000V.
3. The inverter of claim 1 , wherein the SiC MOSFETs are configured to receive gating signals at each gate terminal in excess of 5 kHz, and wherein the SiC MOSFETs are configured to switch between an on state and an off state at a rate in excess of 5 kHz.
4. The inverter of claim 1 , wherein the DC bus comprises: a positive conducting plate that forms a first conductive path, and a negative conducting plate that forms a second conducting path, wherein a portion of the each conducting plate is covered with an insulated coating, wherein the first and second conductive paths are the same shape.
5. The inverter of claim 4 , wherein the insulated coating is a powder coating.
6. The inverter of claim 1 , further comprising: a shoot-through protective circuit comprising: a current sensor inductively coupled to at least one capacitor in the capacitor bank configured to provide an output signal proportional to a capacitor current; a comparator, configured to compare the output signal with a reference current; and a latch, configured to interrupt gating signals and place the SiC MOSFETs in an off state.
7. The inverter of claim 1 , further comprising a capacitor bank, wherein the capacitor bank comprises the capacitor, wherein the capacitor bank is connected across the DC bus and in parallel with the SiC half-bridge module, and wherein the capacitor bank comprises: a first set of two or more capacitors connected in series, having a positive end, a negative end, and an intermediate node; a second set of two or more capacitors connected in series, having a positive end, a negative end, and an intermediate node; and a center tap connecting the intermediate nodes of the first and second sets of two or more capacitors.
8. The inverter of claim 7 , wherein at least one SiC half-bridge module is positioned between the first set of at least two capacitors connected in series and the second set of at least two capacitors connected in series.
9. A bidirectional, two level inverter for a motor and/or generator, comprising: a silicon carbide (SiC) half-bridge module, the SiC half-bridge module comprising: two or more SiC metal-oxide-semiconductor field-effect transistors (MOSFETs) connected in series, wherein each SiC MOSFET has a gate terminal; an alternating current (AC) motor and/or generator terminal connected between the SiC MOSFETs; and a direct current (DC) bus connected across the two or more SiC MOSFETs; a capacitor connected across the DC bus and in parallel with the SiC half-bridge module; and a shoot-through protective circuit comprising: a current sensor inductively coupled to at least one capacitor in the capacitor bank configured to provide an output signal proportional to a capacitor current; a comparator, configured to compare the output signal with a reference current; and a latch, configured to interrupt gating signals and place the SiC MOSFETs in an off state.
10. The inverter of claim 9 , wherein the DC bus voltage is at least 3,000V, and wherein each SiC MOSFET comprises a drain terminal and a source terminal and are rated for a drain to source voltage of at least 10,000V.
11. The inverter of claim 9 , wherein the SiC MOSFETs are configured to receive gating signals at each gate terminal in excess of 5 kHz, and wherein the SiC MOSFETs are configured to switch between an on state and an off state at a rate in excess of 5 kHz.
12. The inverter of claim 9 , wherein the DC bus comprises: a positive conducting plate that forms a first conductive path, and a negative conducting plate that forms a second conducting path, wherein a portion of the each conducting plate is covered with an insulated coating, wherein the first and second conductive paths are the same shape.
13. The inverter of claim 12 , wherein the insulated coating is a powder coating.
14. The inverter of claim 9 , wherein the DC bus comprises: a positive conducting plate that forms a first conductive path, and a negative conducting plate that forms a second conducting path; and where the positive conducting plate and the negative conducting plate are shaped to nest together with the first and second conducting paths adjacent to each other.
15. The inverter of claim 9 , further comprising a capacitor bank, wherein the capacitor bank comprises the capacitor, wherein the capacitor bank is connected across the DC bus and in parallel with the SiC half-bridge module, and wherein the capacitor bank comprises: a first set of two or more capacitors connected in series, having a positive end, a negative end, and an intermediate node; a second set of two or more capacitors connected in series, having a positive end, a negative end, and an intermediate node; and a center tap connecting the intermediate nodes of the first and second sets of two or more capacitors.
16. A bidirectional, two level inverter for a motor and/or generator, comprising: a silicon carbide (SiC) half-bridge module, the SiC half-bridge module comprising: two or more SiC metal-oxide-semiconductor field-effect transistors (MOSFETs) connected in series, wherein each SiC MOSFET has a gate terminal; an alternating current (AC) motor and/or generator terminal connected between the SiC MOSFETs; and a direct current (DC) bus connected across the two or more SiC MOSFETs; and a capacitor bank connected across the DC bus and in parallel with the SiC half-bridge module, the capacitor bank comprising: a first set of two or more capacitors connected in series, having a positive end, a negative end, and an intermediate node; a second set of two or more capacitors connected in series, having a positive end, a negative end, and an intermediate node; and a center tap connecting the intermediate nodes of the first and second sets of two or more capacitors.
17. The inverter of claim 16 , wherein the DC bus voltage is at least 3,000V, and wherein each SiC MOSFET comprises a drain terminal and a source terminal and are rated for a drain to source voltage of at least 10,000V.
18. The inverter of claim 16 , wherein the SiC MOSFETs are configured to receive gating signals at each gate terminal in excess of 5 kHz, and wherein the SiC MOSFETs are configured to switch between an on state and an off state at a rate in excess of 5 kHz.
19. The inverter of claim 16 , wherein the DC bus comprises: a positive conducting plate that forms a first conductive path, and a negative conducting plate that forms a second conducting path, wherein a portion of the each conducting plate is covered with an insulated coating, wherein the first and second conductive paths are the same shape.
20. The inverter of claim 16 , wherein at least one SiC half-bridge module is positioned between the first set of at least two capacitors connected in series and the second set of at least two capacitors connected in series.
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October 9, 2019
February 2, 2021
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