This technology relates to a single-phase differential conversion circuit for improving the linearity of input/output characteristics, a signal processing method for use with the circuit, and a reception apparatus. The single-phase differential conversion circuit includes a first source-grounded amplifier and a second source-grounded amplifier. Each of the amplifiers includes a transconductance amplifier section including a transistor for converting an AC component of input potential to a current, a diode load section including a transistor in a diode connection configured as a first load, and a large-signal distortion compensation circuit configured as a second load connected in parallel with the first load. The transistors of the first source-grounded amplifier are each a P-type MOS transistor, and the transistors of the second source-grounded amplifier are each an N-type MOS transistor. This technology is applied advantageously to a reception apparatus for receiving TV signals, for example.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A single-phase differential conversion circuit, comprising: a first source-grounded amplifier and a second source-grounded amplifier, wherein each of the first source-grounded amplifier and the second source-grounded amplifier including: a transconductance amplifier section including a transistor for converting an AC component of input potential to a current, a diode load section including a transistor in a diode connection configured as a first load, and a large-signal distortion compensation circuit configured as a second load connected in parallel with the first load, each transistor of the first source-grounded amplifier is a P-type MOS transistor, and each transistor of the second source-grounded amplifier is an N-type MOS transistor.
2. The single-phase differential conversion circuit according to claim 1 , wherein the large-signal distortion compensation circuit includes a transistor, a resistive element, and a capacitive element.
3. The single-phase differential conversion circuit according to claim 2 , wherein a gate and a source of the transistor in the large-signal distortion compensation circuit are connected with each other via the capacitive element, and the gate and a drain of the transistor in the large-signal distortion compensation circuit are connected with each other via the resistive element.
4. The single-phase differential conversion circuit according to claim 1 , wherein an output of the first source-grounded amplifier is an input for the diode load section of the second source-grounded amplifier.
5. The single-phase differential conversion circuit according to claim 1 , further comprising a third source-grounded amplifier including: a transconductance amplifier section including a transistor for converting the AC component of the input potential to the current, and a diode load section including a transistor in a diode connection, wherein an output of the second source-grounded amplifier is input for the diode load section of the third source-grounded amplifier.
6. The single-phase differential conversion circuit according to claim 5 , wherein each transistor of the third source-grounded amplifier is the N-type MOS transistor.
7. The single-phase differential conversion circuit according to claim 5 , further comprising an attenuation section configured to attenuate an amplitude of a signal outputted from the third source-grounded amplifier.
8. The single-phase differential conversion circuit according to claim 7 , wherein the attenuation section includes two serially connected capacitive elements.
9. The single-phase differential conversion circuit according to claim 7 , further comprising a first output terminal and a second output terminal configured to output a differential signal, wherein the first output terminal is configured to output a signal input to an input terminal of the single-phase differential conversion circuit, and the second output terminal is configured to output an output of the attenuation section.
10. The single-phase differential conversion circuit according to claim 1 , further comprising a resistor, wherein a signal received by an antenna is input as an input signal, and the resistor is configured to ensure matching between an impedance of the antenna and an impedance of the single-phase differential conversion circuit.
11. A signal processing method, comprising: in a single-phase differential conversion circuit including: a first source-grounded amplifier and a second source-grounded amplifier, wherein each of the first source-grounded amplifier and the second source-grounded amplifier including: a transconductance amplifier section including a transistor for converting an AC component of input potential to a current, a diode load section including a transistor in a diode connection configured as a first load, and a large-signal distortion compensation circuit configured as a second load connected in parallel with the first load, each transistor of the first source-grounded amplifier is a P-type MOS transistor, and each transistor of the second source-grounded amplifier is an N-type MOS transistor causing the first source-grounded amplifier to compensate for a drop in gain of the second source-grounded amplifier; and causing the second source-grounded amplifier to compensate for a drop in gain of the first-source grounded amplifier.
12. A reception apparatus, comprising: a single-phase differential conversion circuit that includes a first source-grounded amplifier and a second source-grounded amplifier, wherein each of the first source-grounded amplifier and the second source-grounded amplifier including: a transconductance amplifier section including a transistor for converting an AC component of input potential to a current, a diode load section including a transistor in a diode connection configured as a first load, and a large-signal distortion compensation circuit configured as a second load connected in parallel with the first load, each transistor of the first source-grounded amplifier is a P-type MOS transistor, and each transistor of the second source-grounded amplifier is an N-type MOS transistor.
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December 6, 2017
April 6, 2021
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