Power semiconductor transistor

1. A power semiconductor transistor, comprising: a semiconductor body having a front side and a backside with a backside surface, wherein the semiconductor body includes a drift region of a first conductivity type and a field stop region of the first conductivity type, wherein the field stop region is arranged between the drift region and the backside, wherein the field stop region comprises, in a cross-section along a vertical direction from the backside to the front side, a concentration profile of donors of the first conductivity type that has: a first local maximum at a first distance from the backside surface, a front width at half maximum associated with the first local maximum, and a back width at half maximum associated with the first local maximum, wherein the front width at half maximum is smaller than the back width at half maximum and amounts to at least 8% of the first distance.

2. The power semiconductor transistor of claim 1 , wherein the front width at half maximum is smaller than half of the back width at half maximum.

3. The power semiconductor transistor of claim 1 , wherein an integral of the donor concentration profile in the field stop region amounts to at least 20% of a break-through charge that is specific for a material of the semiconductor body.

4. The power semiconductor transistor of claim 1 , wherein the first distance is equal to or smaller than 4 μm and/or equal to or larger than 0.3 μm.

5. The power semiconductor transistor of claim 1 , wherein the front width at half maximum is at least 0.225 μm, and/or wherein the back width at half maximum is at least 0.675 μm, and/or wherein a full width at half maximum associated with the first local maximum is at least 0.9 μm.

6. The power semiconductor transistor of claim 1 , wherein at least 80% of the donors in the field stop region are hydrogen induced donors.

7. The power semiconductor transistor of claim 1 , wherein at a distance of 250 nm from the position of the first local maximum in the direction of the front side, the donor concentration is at least 35% of the donor concentration at the first local maximum.

8. The power semiconductor transistor of claim 1 , wherein at a distance of 375 nm from the position of the first local maximum in the direction of the front side, the donor concentration is at least 5% of the donor concentration at the first local maximum.

9. The power semiconductor transistor of claim 1 , wherein at a distance of 500 nm from the position of the first local maximum in the direction of the backside, the donor concentration is at least 60% of the donor concentration at the first local maximum.

10. The power semiconductor transistor of claim 1 , wherein at a distance of 1500 nm from the position of the first local maximum in the direction of the backside, the donor concentration is at least 25% of the donor concentration at the first local maximum.

11. The power semiconductor transistor of claim 1 , wherein along at least 80% of an extension of the field stop region along a lateral direction perpendicular to the vertical direction, the donor concentration at the first local maximum varies by less than 10%, and/or wherein in an active area of the power semiconductor transistor, the donor concentration at the first local maximum varies by less than 10% along the lateral direction.

12. The power semiconductor transistor of claim 1 , wherein the semiconductor body comprises a backside emitter region of a second conductivity type complementary to the first conductivity type, the backside emitter region being arranged at the backside, and wherein a transition between the backside emitter region and the field stop region forms a pn-junction.

13. The power semiconductor transistor of claim 12 , wherein a current amplification factor α pnp of a partial transistor formed by the backside emitter region, the field stop region, the drift region and a body region of at least one control cell varies by less than 10% along a lateral direction perpendicular to the vertical direction.

14. The power semiconductor transistor of claim 1 , wherein the field stop region comprises a plurality of local maxima, wherein a first local maximum of the plurality of local maxima is located closer to the backside surface than each of the other local maxima of the plurality of local maxima, wherein an n th local maximum of the plurality of local maxima is located further away from the backside surface than each of the other local maxima of the plurality of local maxima, and wherein the donor concentration at the first local maximum is higher than the donor concentration at each of the other local maxima of the plurality of local maxima.

15. The power semiconductor transistor of claim 14 , wherein the donor concentration at the first local maximum is at least 1e15 cm −3 .

16. The power semiconductor transistor of claim 14 , wherein the donor concentration at the n th local maximum is equal to or smaller than 2e15 cm −3 , and/or wherein the donor concentration at the n th local maximum is equal to or smaller than 500 times a donor concentration of the drift region.

17. The power semiconductor transistor of claim 14 , wherein the respective donor concentration at each of the plurality of local maxima is in the range from 3e13 cm −3 to 5e16 cm −3 .

18. The power semiconductor transistor of claim 14 , wherein the respective donor concentration at each of the plurality of local maxima except for the first local maximum is in a range from 2 times a donor concentration of the drift region to 400 times the donor concentration of the drift region, and/or wherein the respective donor concentration at each of the plurality of local maxima except for the first local maximum is in a range from 5e13 cm −3 to 1.6e15 cm −3 .

19. The power semiconductor transistor of claim 14 , wherein the donor concentration at each of the plurality of local maxima except for the first local maximum is constant or increases when going from one local maximum to a neighboring local maximum in a direction towards the backside surface.

20. The power semiconductor transistor of claim 14 , wherein the donor concentration at the n th local maximum is equal to or larger than a donor concentration at an (n−1)st local maximum neighboring the n th local maximum, the (n−1)st local maximum being located closer to the backside surface than the n th local maximum.

21. A method of processing a power semiconductor transistor, the method comprising: providing a semiconductor body having a front side and a backside with a backside surface; and forming a field stop region inside the semiconductor body by at least one proton implantation step, wherein the at least one proton implantation step is carried out through the backside surface: at an implantation angle with respect to a backside surface normal, the implantation angle being in the range from 20° to 60°; at an implantation energy in a range from 100 keV to 800 keV; and with an implantation dose yielding an integral of a resulting donor concentration profile in the field stop region of at least 20% of a break-through charge that is specific for a material of the semiconductor body.

22. The method of claim 21 , wherein the field stop region is formed inside the semiconductor body by a plurality of proton implantation steps which differ from one another in that each proton implantation step is carried out from different azimuthal directions with respect to the backside surface.

23. The method of claim 21 , wherein a plurality of particles are present on the backside surface, the particles having a maximal lateral extension (E), and wherein the implantation angle (β) and/or the implantation energy are chosen such that a resulting penetration depth (c) satisfies the equation: c ≥ E 2 ⁢ ⁢ cos ⁡ ( 90 ⁢ ° - β ) .

24. The method of claim 23 , wherein the implantation angle (β) and/or the implantation energy are chosen such that the resulting penetration depth (c) satisfies the equation: c ≤ 1.2 · E 2 ⁢ ⁢ cos ⁡ ( 90 ⁢ ° - β ) .

25. The method of claim 21 , wherein creating the field stop region further comprises an irradiation of Helium through the backside surface.

26. The method of claim 21 , further comprising: after the at least one proton implantation step, an annealing step carried out at temperatures in a range from 360° C. to 440° C. for a duration in a range from 30 minutes to 4 hours.

27. A method of processing a power semiconductor transistor, the method comprising: providing a semiconductor body having a front side and a backside, the backside having a surface defined by a backside surface normal; structuring the backside such that a plurality of surface portions are formed, which differ from one another in that the surface portions have different orientations with respect to the backside surface normal; and forming a field stop region inside the semiconductor body by at least one proton implantation step carried out through the backside surface, wherein a proton beam is deflected by the plurality of surface portions during the at least one proton implantation step.