Patentable/Patents/US-11038457
US-11038457

Motor drive

PublishedJune 15, 2021
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

A motor drive includes a rectifier bridge, which rectifier bridge is connected to an DC link, which is connected to an inverter bridge having phase outputs configured to be connected to an elevator motor, as well as a drive control controlling the semiconductor switches of the inverter bridge. The inverter bridge has upper semiconductor switches of the upper side connected to plus of the DC link and lower semiconductor switches of the lower side connected to minus of the DC link, the upper semiconductor switches are semiconductor switches without desaturation- and/or over-current protection whereas the lower semiconductor switches comprise a desaturation- and/or over-current protection, or vice versa. The drive control includes an earth fault control circuit which is configured to establish an earth fault test, in which each single semiconductor switch comprising a desaturation- and/or over-current protection is switched through, only one at a time, over a test time period, whereby the earth fault control circuit is configured to enable start of the motor drive only if the earth fault test has not lead to a tripping of the desaturation- and/or over-current protection of one of the semiconductor switches.

Patent Claims
19 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A motor drive for a passenger conveyor, the motor drive comprising: a rectifier bridge, said rectifier bridge being connected to an DC link, said DC link being connected to an inverter bridge having phase outputs configured to be connected to an elevator motor; and a drive control controlling the semiconductor switches of the inverter bridge, wherein the inverter bridge has upper semiconductor switches of the upper side connected to plus of the DC link and lower semiconductor switches of the lower side connected to minus of the DC link, wherein the upper semiconductor switches are semiconductor switches without desaturation protection and/or over-current protection, whereas the lower semiconductor switches comprise a desaturation protection and/or over-current protection, or vice versa, wherein the drive control comprises an earth fault control circuit configured to establish an earth fault test, and wherein the earth fault control circuit is configured to perform an earth fault test, in which each single semiconductor switch comprising a desaturation protection and/or over-current protection is switched through, only one at a time, over a test time period whereby the earth fault control circuit is configured to enable start of the motor drive only if the earth fault test has not lead to a tripping of the desaturation protection and/or over-current protection of one of the lower semiconductor switches.

2

2. The motor drive according to claim 1 , wherein the test time period is between 1 and 20 microseconds.

3

3. The motor drive according to claim 1 , in which the drive control is referenced to minus of the DC link, and the lower semiconductor switches comprise the desaturation protection.

4

4. The motor drive according to claim 1 , wherein the desaturation protection of the semiconductor switches is implemented by their gate-drivers.

5

5. The motor drive according to claim 1 , wherein the desaturation protection of the semiconductor switches is implemented by the drive control.

6

6. The motor drive according to claim 1 , wherein control signal paths from the drive control to control poles of the lower side semiconductor switches are implemented without galvanic isolation.

7

7. The motor drive according to claim 1 , wherein the input of the rectifier bridge comprises contactors or a contactor relay controlled in response to a tripping of the desaturation- and/or over-current protection of a semiconductor switch and/or in response to a current sensor signal.

8

8. The motor drive according to claim 1 , wherein the semiconductor switches are IGBT or MOSFET transistors.

9

9. The motor drive according to claim 2 , in which the drive control is referenced to minus of the DC link, and the lower semiconductor switches comprise the desaturation protection.

10

10. The motor drive according to claim 2 , wherein the desaturation protection of the semiconductor switches is implemented by their gate-drivers.

11

11. The motor drive according to claim 2 , wherein the desaturation protection of the semiconductor switches is implemented by the drive control.

12

12. The motor drive according to claim 2 , wherein control signal paths from the drive control to control poles of the lower side semiconductor switches are implemented without galvanic isolation.

13

13. The motor drive according to claim 3 , wherein the desaturation protection of the semiconductor switches is implemented by their gate-drivers.

14

14. The motor drive according to claim 3 , wherein the desaturation protection of the semiconductor switches is implemented by the drive control.

15

15. The motor drive according to claim 3 , wherein control signal paths from the drive control to control poles of the lower side semiconductor switches are implemented without galvanic isolation.

16

16. The motor drive according to claim 4 , wherein the desaturation protection of the semiconductor switches is implemented by the drive control.

17

17. A motor drive according to claim 4 , wherein control signal paths from the drive control to control poles of the lower side semiconductor switches are implemented without galvanic isolation.

18

18. A method for driving an elevator motor, using a motor drive, the motor drive comprising: a rectifier bridge, the rectifier bridge being connected to a DC link, the DC link being connected to an inverter bridge having phase outputs to be connected to the elevator motor; and a drive control controlling the semiconductor switches of the inverter bridge, the drive control comprising an earth fault control circuit configured to establish an earth fault test, wherein the inverter bridge has upper semiconductor switches of the upper side connected to plus of the DC link and lower semiconductor switches of the lower side connected to minus of the DC link, wherein the upper semiconductor switches are semiconductor switches without desaturation- and/or over-current protection, whereas the lower semiconductor switches comprise a desaturation- and/or over-current protection or vice versa, said method comprising: performing, before the start of the elevator motor, an earth fault test with the earth fault control circuit, wherein each single semiconductor switch comprising a desaturation- and/or over-current protection, only one at a time, is switched through for a test time period, whereby the earth fault control circuit enables start of the motor drive only if the earth fault test has not lead to a tripping of the desaturation- and/or over-current protection of any of these semiconductor switches.

19

19. A motor drive configured to perform the method according to 18 .

Classification Codes (CPC)

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Patent Metadata

Filing Date

July 2, 2019

Publication Date

June 15, 2021

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Cite as: Patentable. “Motor drive” (US-11038457). https://patentable.app/patents/US-11038457

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