In an integrated circuit, a metal-insulator-metal (MIM) diode includes: a first metallization structure level having a first metal layer; a first dielectric layer over the first metal layer; a metal contact or via on the first metal layer and extending through a portion of the first dielectric layer; and a second metallization structure level having a second metal layer; and a second dielectric layer over the second metal layer. The diode has a first electrode on the metal contact or via, a multilayer dielectric structure on the first electrode, and a second electrode between the multilayer dielectric structure and the second metal layer.
Legal claims defining the scope of protection, as filed with the USPTO.
1. An integrated circuit (IC), comprising: a semiconductor layer; a multilevel metallization structure over the semiconductor layer; a first metallization structure level in the multilevel metallization structure, the first metallization structure level having: a first metal layer; a first dielectric layer over the first metal layer; and a metal contact or via on the first metal layer and extending through a portion of the first dielectric layer; a second metallization structure level in the multilevel metallization structure, the second metallization structure level having: a second metal layer; and a second dielectric layer over the second metal layer; and a diode, having: a first electrode on the metal contact or via, in which the first electrode is a metal layer having a work function greater than 5 eV; a multilayer dielectric structure on the first electrode; and a second electrode on the multilayer dielectric structure, the second metal layer on the second electrode.
2. The IC of claim 1 , wherein a first layer and a last layer of the multilayer dielectric structure are one of aluminum oxide, zirconium dioxide, silicon dioxide, hafnium dioxide, or tantalum oxide.
3. The IC of claim 2 , wherein: the multilayer dielectric structure has an odd number N layers, N being greater than 2; odd numbered layers of the multilayer dielectric structure are one of aluminum oxide, zirconium dioxide, silicon dioxide, hafnium dioxide, or tantalum oxide; and even numbered layers of the multilayer dielectric structure are one of titanium oxide, nickel oxide, cobalt oxide, tungsten oxide, copper oxide, or germanium oxide.
4. The IC of claim 2 , wherein: the metal contact or via is a tungsten layer on the first metal layer; and the first electrode is tungsten nitride.
5. The IC of claim 4 , wherein: the multilayer dielectric structure has an odd number N layers, N being greater than 2; odd numbered layers of the multilayer dielectric structure are one of aluminum oxide, zirconium dioxide, silicon dioxide, hafnium dioxide, or tantalum oxide; and even numbered layers of the multilayer dielectric structure are one of titanium oxide, nickel oxide, cobalt oxide, tungsten oxide, copper oxide, or germanium oxide.
6. The IC of claim 5 , wherein the second electrode is a metal layer having a work function less than 5 eV.
7. The IC of claim 1 , wherein the second electrode is a metal layer having a work function less than 5 eV.
8. The IC of claim 1 , wherein: the metal contact or via is a tungsten layer on the first metal layer; and the first electrode is tungsten nitride.
9. The IC of claim 1 , wherein the first metal layer and the second metal layer are aluminum.
10. The IC of claim 1 , wherein the first metal layer and the second metal layer are copper.
11. An integrated circuit (IC), comprising: a semiconductor layer; a multilevel metallization structure over the semiconductor layer; a first metallization structure level in the multilevel metallization structure, the first metallization structure level having: a first metal layer; a first dielectric layer over the first metal layer; and a metal contact or via on the first metal layer and extending through a portion of the first dielectric layer, in which the metal contact or via is a tungsten layer on the first metal layer; a second metallization structure level in the multilevel metallization structure, the second metallization structure level having: a second metal layer; and a second dielectric layer over the second metal layer; and a diode, having: a first electrode on the metal contact or via, in which the first electrode is tungsten nitride; a multilayer dielectric structure on the first electrode, in which a first layer and a last layer of the multilayer dielectric structure are aluminum oxide; and a second electrode on the multilayer dielectric structure, the second metal layer on the second electrode.
12. A diode, comprising: a first electrode on a metal contact or via in a first metallization structure level of a multilevel metallization structure, in which the first electrode is a metal layer having a work function greater than 5 eV; a multilayer dielectric structure on the first electrode; and a second electrode having a first side and an opposite second side, the first side on the multilayer dielectric structure, and the second side below a second metal layer in a second metallization structure level of the multilevel metallization structure.
13. The diode of claim 12 , wherein a first layer and a last layer of the multilayer dielectric structure are one of aluminum oxide, zirconium dioxide, silicon dioxide, hafnium dioxide, or tantalum oxide.
14. The diode of claim 12 , wherein the metal contact or via is a tungsten layer, and the first electrode is tungsten nitride.
15. A diode comprising: a first electrode on a metal contact or via in a first metallization structure level of a multilevel metallization structure; a multilayer dielectric structure on the first electrode, in which: a first layer and a last layer of the multilayer dielectric structure are one of aluminum oxide, zirconium dioxide, silicon dioxide, hafnium dioxide, or tantalum oxide; the multilayer dielectric structure has an odd number N layers, N being greater than 2; odd numbered layers of the multilayer dielectric structure are one of aluminum oxide, zirconium dioxide, silicon dioxide, hafnium dioxide, or tantalum oxide; and even numbered layers of the multilayer dielectric structure are one of titanium oxide, nickel oxide, cobalt oxide, tungsten oxide, copper oxide, or germanium oxide; and a second electrode having a first side and an opposite second side, the first side on the multilayer dielectric structure, and the second side below a second metal layer in a second metallization structure level of the multilevel metallization structure.
16. A method of fabricating a multilevel metallization structure of an integrated circuit, the method comprising: forming a metal contact or via on a first metal layer and through a portion of a first dielectric layer in a first metallization structure level in a multilevel metallization structure; forming a first electrode on the metal contact or via, including performing a plasma nitridation process that nitrides a portion of the metal contact or via to form the first electrode on the metal contact or via; forming a multilayer dielectric structure on the first electrode; forming a second electrode on the multilayer dielectric structure; and forming a second metal layer in a second metallization structure level in the multilevel metallization structure.
17. A method of fabricating a multilevel metallization structure of an integrated circuit, the method comprising: forming a metal contact or via on a first metal layer and through a portion of a first dielectric layer in a first metallization structure level in a multilevel metallization structure; forming a first electrode on the metal contact or via; forming a multilayer dielectric structure on the first electrode, including performing an odd integer number N atomic layer deposition processes that successively deposit N respective dielectric layers over the first electrode; forming a second electrode on the multilayer dielectric structure; and forming a second metal layer in a second metallization structure level in the multilevel metallization structure.
18. The method of claim 17 , wherein a first one of the atomic layer deposition processes is performed in an oxidative environment.
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October 30, 2019
June 29, 2021
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