A bus monitoring system, a method and an apparatus, wherein the system comprises: a bus node; a bus monitoring module configured to monitor a first bus where the bus monitoring module is located to generate monitoring information; an information storage module configured to acquire the monitoring information from the bus monitoring module through a second bus; the first bus being configured to connect a master device and a slave device of the bus node; the second bus being configured to connect the information storage module and the bus monitoring module, wherein the second bus is independent from the first bus. By means of the present disclosure, the technical problem that bus monitoring information cannot be acquired when bus exception occurs in the related art is solved.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A bus monitoring system, comprising: a bus node; a bus monitoring circuit configured to monitor a first bus where the bus monitoring circuit is located to generate monitoring information; an information storage device configured to acquire the monitoring information from the bus monitoring circuit through a second bus; the first bus configured to connect a master device and a slave device of the bus node; and the second bus configured to connect the information storage device and the bus monitoring circuit, wherein, the second bus is independent of the first bus; wherein the system further comprises: a chip reset circuit configured to execute a reset operation on a chip where the bus node is located, when detecting an indication that the monitoring information is saved; and a fault analysis circuit configured to perform fault analysis based on the monitoring information.
2. The system of claim 1 , wherein the second bus is further configured to expand a traffic flow of a path for a designated use.
3. The system of claim 1 , wherein the system further comprises: a storage device configured to save the monitoring information.
4. The system of claim 3 , wherein the second bus is further configured to connect the information storage device and the storage device.
5. A bus monitoring method, comprising: monitoring a first bus where a bus monitoring circuit is located to generate monitoring information; acquiring the monitoring information from the bus monitoring circuit through a second bus; wherein the second bus is independent of the first bus; wherein after acquiring the monitoring information from the bus monitoring circuit through the second bus, the method further comprises: saving the monitoring information; and wherein after saving the monitoring information, the method further comprises: executing a reset operation on a chip where a bus node is located, and after the reset operation is completed, performing fault analysis based on the monitoring information.
6. The method of claim 5 , wherein the step of acquiring the monitoring information from the bus monitoring circuit through a second bus comprises one of: acquiring the monitoring information from the bus monitoring circuit through the second bus according to event trigger; acquiring the monitoring information from the bus monitoring circuit through the second bus according to query state; and acquiring the monitoring information from the bus monitoring circuit through the second bus according to continuous storage.
7. The method of claim 5 , wherein the step of executing the reset operation on the chip where the bus node is located comprises: executing the reset operation on the chip where the bus node is located, when detecting an indication that the monitoring information is saved.
8. The method of claim 5 , wherein the step of performing fault analysis based on the monitoring information comprises: deducing an access model of the chip based on the monitoring information; and locating a fault type according to the access model.
9. The method of claim 5 , wherein the step of performing fault analysis based on the monitoring information comprises: traversing all master devices to read a serial number of the bus node directly connected with a current master device; reading historical access information of a corresponding bus node according to the serial number of the bus node; analyzing the historical access information to detect whether the current master device initiates access; when the access is initiated, judging whether an access address is in a legal range or not; when the access address is not in a legal range, recording at least one piece of the following node information: master device serial number, access address, and access attribute; and locating the master device of illegal access according to the node information.
10. The method of claim 5 , wherein after performing fault analysis based on the monitoring information, the method further comprises: determining a fault bus node; when a current bus node initiates access, detecting whether an access address of the fault bus node is legal or not; and when the access address of the fault bus node is illegal, prohibiting access to the fault bus node.
11. The method of claim 5 , wherein the step of monitoring the first bus where the bus monitoring circuit is located to generate the monitoring information comprises: monitoring access information of the bus node through the first bus, and saving the access information to a bus monitoring circuit to obtain the monitoring information of the bus node.
12. The method of claim 5 , wherein the step of acquiring the monitoring information from the bus monitoring circuit through a second bus comprises: when current access information indicates that the bus node is abnormal, acquiring the monitoring information from the bus monitoring circuit through the second bus; and when the current access information indicates that the bus node is normal, acquiring the monitoring information from the bus monitoring circuit through the second bus.
13. A bus monitoring apparatus comprising: a bus monitoring circuit configured to monitor a first bus where the bus monitoring circuit is located to generate monitoring information; and an acquisition circuit configured to acquire the monitoring information from the bus monitoring circuit through a second bus, wherein the second bus is independent of the first bus; wherein the apparatus further comprises a storage device configured to save the monitoring information; wherein the apparatus further comprises: a reset circuit configured to execute a reset operation on a chip where a bus node is located after the storage device saves the monitoring information; and an analysis circuit configured to, in response to completion of the reset operation, perform fault analysis based on the monitoring information.
14. The apparatus of claim 13 , wherein the acquisition circuit comprises one of: a first acquisition sub-circuit configured to acquire the monitoring information from the bus monitoring circuit through the second bus according to event trigger; a second acquisition sub-circuit configured to acquire the monitoring information from the bus monitoring circuit through the second bus according to query state; and a third acquisition sub-circuit configured to acquire the monitoring information from the bus monitoring circuit through the second bus according to continuous storage.
15. The apparatus of claim 13 , wherein the apparatus further comprises: a determination circuit configured to determine a fault bus node after the analysis circuit performs fault analysis based on the monitoring information; a detection circuit configured to detect whether the access address of the fault bus node is legal or not when a current bus node initiates access; and a processing circuit configured to prohibit access to the fault bus node when an access address of the fault bus node is illegal.
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July 12, 2018
August 17, 2021
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