A microelectronic device has a die with a first electrically conductive pillar, and a second electrically conductive pillar, mechanically coupled to the die. The microelectronic device includes a first electrically conductive extended head electrically coupled to the first pillar, and a second electrically conductive extended head electrically coupled to the second pillar. The first pillar and the second pillar have equal compositions of electrically conductive material, as a result of being formed concurrently. Similarly, the first extended head and the second extended head have equal compositions of electrically conductive material, as a result of being formed concurrently. The first extended head provides a bump pad, and the second extended head provides at least a portion of a first plate of an integrated capacitor. A second plate may be located in the die, between the first plate and the die, or on an opposite of the first plate from the die.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A microelectronic device, comprising: a die having a connection surface; a first pillar mechanically coupled to the connection surface, the first pillar being electrically conductive; a second pillar mechanically coupled to the connection surface, the second pillar being electrically conductive, wherein the first pillar and the second pillar have equal compositions of electrically conductive material; a first extended head electrically coupled to the first pillar, the first extended head being electrically conductive, the first extended head extending past the first pillar in a direction parallel to the connection surface; a second extended head electrically coupled to the second pillar, the second extended head being electrically conductive, the second extended head extending past the second pillar in a direction parallel to the connection surface, wherein: the first extended head and the second extended head have equal compositions of electrically conductive material; the first extended head provides a solder bump pad; and the second extended head provides at least a portion of a first plate of an integrated capacitor of the microelectronic device; and a second plate of the integrated capacitor, wherein the second plate is located in the die under the first plate.
2. The microelectronic device of claim 1 , further comprising a package isolation structure between the first plate and the second plate, the package isolation structure being electrically non-conductive, wherein the package isolation structure laterally surrounds the first pillar and the second pillar.
3. The microelectronic device of claim 1 , further comprising a lead frame, wherein the first plate is electrically coupled to a lead of the lead frame through an electrically conductive material.
4. The microelectronic device of claim 1 , further comprising an isolation layer on a surface of the first plate located opposite from the connection surface, the isolation layer being electrically non-conductive.
5. The microelectronic device of claim 1 , wherein the first pillar is electrically coupled to a terminal of the die, the terminal being located at the connection surface, the terminal being electrically conductive.
6. A method of forming a microelectronic device, comprising: providing a die having a connection surface; forming a first pillar and a second pillar concurrently on the connection surface, the first pillar and the second pillar being electrically conductive, the first pillar and the second pillar being mechanically coupled to the connection surface; and forming a first extended head and a second extended head concurrently, the first extended head being electrically coupled to the first pillar, and the second extended head being electrically coupled to the second pillar; wherein: the first extended head and the second extended head are electrically conductive; the first extended head extends past the first pillar in a direction parallel to the connection surface of the die; the second extended head extends past the second pillar in a direction parallel to the connection surface of the die; the first extended head provides a bump pad; and the second extended head provides at least a portion of a first plate of an integrated capacitor.
7. The method of claim 6 , wherein a second plate of the integrated capacitor is located in the die.
8. The method of claim 6 , further comprising forming a second plate of the integrated capacitor over the connection surface, before forming the second extended head.
9. The method of claim 8 , wherein the second plate is formed concurrently with the first pillar and the second pillar.
10. The method of claim 6 , further comprising: forming a second plate of the integrated capacitor; and forming a dielectric layer on the second plate, before forming the second extended head.
11. The method of claim 6 , further comprising electrically coupling the bump pad to a lead frame of the microelectronic device, wherein the lead frame provides a second plate of the integrated capacitor.
12. The method of claim 6 , further comprising: forming a second plate of the integrated capacitor; and forming a package isolation structure on the die, the package isolation structure being electrically non-conductive, wherein the package isolation structure laterally surrounds the first pillar and the second pillar, and extends between the first plate and the second plate.
13. The method of claim 6 , further comprising forming an isolation layer on a surface of the first plate located opposite from the connection surface, the isolation layer being electrically non-conductive.
14. The method of claim 6 , wherein the first pillar and the second pillar are formed by a plating process.
15. The method of claim 6 , wherein the first extended head and the second extended head are formed by a plating process.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
September 30, 2019
August 17, 2021
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