Patentable/Patents/US-11134208
US-11134208

Increasing dynamic range of digital pixels by utilizing polling during integration

PublishedSeptember 28, 2021
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

Digital circuitry is provided that periodically reads at least one bit of digital counters associated with pixels of an image sensor. When the read bit(s) of a particular digital counter decrease between subsequent reads, then the digital circuitry increments an overflow counter associated with the particular digital counter. The value of each of the overflow counters of the digital circuitry are used with the corresponding values of the digital counters to generate pixel values for a frame (also referred to as an image).

Patent Claims
20 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A method performed using digital circuitry for increasing a dynamic range of a video frame, the method comprising: storing an overflow counter associated with each of a plurality of digital counters of an imaging system, wherein each of the digital counters is associated with and in communication with a respective one of pixels of the imaging system, and each of the digital counters is configured to store a digital counter value based on a signal received from the respective one of the pixels; for each of the plurality of digital counters: periodically reading at least one bit of the digital counter value over multiple iterations; comparing the at least one bit of the digital counter value from one iteration of the multiple iterations to a previous iteration of the multiple iterations; and when a value represented by the at least one bit of the digital counter value has decreased from the previous iteration to the one iteration, incrementing an associated overflow counter of the digital circuitry; and converting and outputting the digital counter value from at least one of the plurality of digital counters and the associated overflow counter as at least one pixel value of the video frame.

2

2. The method of claim 1 , wherein the at least one bit is less than all bits of the digital counter value.

3

3. The method of claim 2 , wherein the at least one bit is only a most significant bit of the digital counter value.

4

4. The method of claim 1 , further comprising: for each of the plurality of pixels, storing an electrical charge generated by the pixel in one of a plurality of electrical storage devices associated with the respective pixel; periodically determining whether a cumulative electrical charge in the respective electrical storage device exceeds a predetermined threshold value; and in response to determining that the cumulative electrical charge stored in the respective electrical storage device exceeds the predetermined threshold value, reducing the electrical charge stored in the respective electrical storage device by a predetermined charge reduction amount and incrementing one of a plurality of digital counter values stored in the digital counters and associated with the respective pixel.

5

5. The method of claim 4 , wherein each of the pixels further comprises a photodetector configured to generate the electrical charge in response to light impinging thereon; and further comprising, based on an intensity of the light impinging upon the photodetector of at least one of the pixels, determining a duration of time of the period at which the digital circuitry reads at least one bit of the digital counter value over multiple iterations.

6

6. The method of claim 5 , wherein the duration of time of the period is determined based on the intensity of the light impinging upon the photodetector of a pixel that is receiving a highest intensity of among light of the pixels.

7

7. The method of claim 4 , further comprising: periodically converting for each of the plurality of pixels a residual electrical charge in the respective electrical storage device of each of the plurality of pixels into an analog signal; and converting the analog signal from each pixel into a respective digital binary value using one of a plurality of analog-to-digital converters, each of the plurality of analog-to-digital converters having an input and an output, and each of the plurality of analog-to-digital converters being coupled via its input to the respective electrical storage device of a corresponding one of the plurality of pixels; wherein the respective digital binary value is additionally used in the conversion of the at least one of the plurality of digital counters and the associated overflow counter into the at least one pixel value of the video frame.

8

8. Digital circuitry for increasing a dynamic range of a video frame, the digital circuitry configured to: store an overflow counter associated with each of a plurality of digital counters of an imaging system, wherein each of the digital counters is associated with and in communication with a respective one of pixels of the imaging system, and each of the digital counters is configured to store a digital counter value based on a signal received from the respective one of the pixels; and for each of the plurality of digital counters: periodically read at least one bit of the digital counter value over multiple iterations; compare the at least one bit of the digital counter value from one iteration of the multiple iterations to a previous iteration of the multiple iterations; and when a value represented by the at least one bit of the digital counter value has decreased from the previous iteration to the one iteration, increment an associated overflow counter.

9

9. The digital circuitry of claim 8 , wherein the at least one bit is less than all bits of the digital counter value.

10

10. The digital circuitry of claim 9 , wherein the at least one bit is only a most significant bit of the digital counter value.

11

11. The digital circuitry of claim 8 : wherein each of the pixels further comprises a photodetector configured to generate the electrical charge in response to light impinging thereon; and wherein a duration of time of the period at which the digital circuitry reads at least one bit of the digital counter value over multiple iterations is determined based on an intensity of the light impinging upon the photodetector of at least one of the pixels.

12

12. The digital circuitry of claim 11 , wherein the duration of time of the period is determined based on the intensity of the light impinging upon the photodetector of a pixel that is receiving a highest intensity of the light among the pixels.

13

13. An imaging system comprising: an array of pixels, each of the pixels including: an electrical storage device configured to accumulate an electrical charge from photo-current, and quantization circuitry coupled to the electrical storage device and configured to convert the electrical charge into an analog quantization event signal; a plurality of digital counters corresponding to the array of pixels, each of the digital counters being associated with and in communication with a respective one of the pixels, and each of the digital counters is configured to store a digital counter value in response to receiving the analog quantization event signal from the respective one of the pixel; and digital circuitry storing an overflow counter associated with each of the plurality of digital counters, and configured to, for each of the plurality of digital counters: periodically read at least one bit of the digital counter value over multiple iterations; compare the at least one bit of the digital counter value from one iteration of the multiple iterations to a previous iteration of the multiple iterations; and when a value represented by the at least one bit of the digital counter value has decreased from the previous iteration to the one iteration, increment an associated overflow counter.

14

14. The imaging system of claim 13 , wherein the at least one bit is less than all bits of the digital counter value.

15

15. The imaging system of claim 14 , wherein the at least one bit is only a most significant bit of the digital counter value.

16

16. The imaging system of claim 13 , wherein each of the pixels further comprises a photodetector configured to generate the photo-current in response to light impinging thereon; and wherein a duration of time of the period at which the digital circuitry reads at least one bit of the digital counter value over multiple iterations is determined based on an intensity of the light impinging upon the photodetector of at least one of the pixels.

17

17. The imaging system of claim 16 , wherein the duration of time of the period is determined based on the intensity of the light impinging upon the photodetector of a pixel that is receiving a highest intensity of the light among the pixels.

18

18. The imaging system of claim 13 , further comprising a digital formatter configured to convert the digital counter value from at least one of the plurality of digital counters and the associated overflow counter into at least one pixel value of a video frame.

19

19. The imaging system of claim 13 , further comprising a plurality of analog-to-digital converters, each of the plurality of analog-to-digital converters having an input and an output; and wherein each of the plurality of analog-to-digital converters is coupled via its input to the electrical storage device of at least one of the pixels and configured to convert a residual electrical charge in the respective electrical storage device into a digital binary value; and wherein the digital formatter additionally utilizes the digital binary value from at least one of the plurality of analog-to-digital converters in the conversion of the digital counter value from the at least one of the plurality of digital counters and the associated overflow counter into the at least one pixel value of the video frame.

20

20. The imaging system of claim 13 , wherein each of the pixels further comprises a photodetector configured to generate the photo-current in response to light impinging thereon; and wherein the digital counter value corresponds to an intensity of the light impinging upon the photodetector of the respective one of the pixels.

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Patent Metadata

Filing Date

November 17, 2020

Publication Date

September 28, 2021

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Cite as: Patentable. “Increasing dynamic range of digital pixels by utilizing polling during integration” (US-11134208). https://patentable.app/patents/US-11134208

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Increasing dynamic range of digital pixels by utilizing polling during integration — Joseph Costa | Patentable