Wiring substrate

1. A wiring substrate comprising: a first insulation layer; an electronic component including a first surface and a second surface which is an opposite surface to the first surface, the electronic component being mounted on the first insulation layer with the first surface facing toward the first insulation layer; and a second insulation layer including a first layer and a second layer, wherein the first layer is formed on the first insulation layer and configured to cover the second surface of the electronic component, and the second layer is stacked on the first layer, wherein the first layer is formed of a first insulating resin that includes therein fillers, and the second layer is formed of a second insulating resin that is different than the first insulating resin, wherein at least one of the fillers is in direct contact with the second surface of the electronic component at one side, and is exposed from the first layer and is thus in direct contact with the second layer at the other side, and wherein a heat conductivity of the second insulating resin forming the second layer is higher than a heat conductivity of the first insulating resin forming the first layer.

2. The wiring substrate according to claim 1 , further comprising: a first reinforcement member arranged in a region of the first layer located on the second surface of the electronic component, wherein the first reinforcement member includes holes and the fillers are arranged in the holes, and wherein said at least one of the fillers, which is in direct contact with the second surface of the electronic component at one side, and the other side thereof is exposed from the first layer and is thus in direct contact with the second layer, is arranged in one of the holes.

3. The wiring substrate according to claim 1 , further comprising: a second reinforcement member arranged in the second layer.

4. The wiring substrate according to claim 1 , wherein as seen from above, in a region of the first layer located around the electronic component, a content of the fillers in a region closer to the second layer than a position of a half thickness of the first layer is larger than a content of the fillers in a region closer to the first insulation layer than the position of the half thickness of the first layer.

5. The wiring substrate according to claim 1 , wherein a roughness degree of an upper surface of the second layer is smaller than a roughness degree of an upper surface of the first layer.

6. The wiring substrate according to claim 5 , further comprising: a wiring layer formed on the upper surface of the second layer, wherein the wiring layer has a line/space equal to or smaller than 30 μm/30 μm.

7. The wiring substrate according to claim 1 , wherein the electronic component is a semiconductor chip, the first surface is a circuit formation surface of the semiconductor chip and the second surface is a rear surface of the semiconductor chip, the semiconductor chip is mounted on the first insulation layer with the circuit formation surface facing toward the first insulation layer, and has the rear surface covered with the first layer.

8. The wiring substrate according to claim 1 , wherein a thickness of a part, which covers the second surface of the electronic component, of the first layer is substantially the same as a maximum particle size of said at least one of the fillers.