Semiconductor devices with antennas and electromagnetic interference (EMI) shielding, and associated systems and methods, are described herein. In one embodiment, a semiconductor device includes a semiconductor die coupled to a package substrate. An antenna structure is disposed over and/or adjacent the semiconductor die. An electromagnetic interference (EMI) shield is disposed between the semiconductor die and the antenna structure to shield at least the semiconductor die from electromagnetic radiation generated by the antenna structure and/or to shield the antenna structure from interference generated by the semiconductor die. A first dielectric material and/or a thermal interface material can be positioned between the semiconductor die and the EMI shield, and a second dielectric material can be positioned between the EMI shield and the antenna structure. In some embodiments, the semiconductor device includes a package molding over at least a portion of the antenna, the EMI shield, and/or the second dielectric material.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A semiconductor device, comprising: a package substrate having a ground plane embedded beneath a first surface of the package substrate and accessible via the first surface of the package substrate; a semiconductor die coupled to the first surface of the package substrate; an antenna structure configured for wireless communication; and an electromagnetic interference (EMI) shield surrounding at least a portion of the semiconductor die and between the semiconductor die and the antenna structure, wherein the EMI shield is electrically coupled to the ground plane via the first surface, and wherein the EMI shield is configured to shield at least the semiconductor die from electromagnetic interference.
2. The semiconductor device of claim 1 , further comprising a first dielectric material between the semiconductor die and the EMI shield, wherein the first dielectric material is configured to separate and electrically isolate the EMI shield from the semiconductor die.
3. The semiconductor device of claim 2 , wherein the EMI shield has a thickness between 1 μm and 30 μm.
4. The semiconductor device of claim 1 , further comprising a first underfill material between the package substrate and the semiconductor die, wherein the first underfill material is configured to electrically isolate electrical connections between the semiconductor die and contacts of the package substrate formed via the first surface of the package substrate.
5. The semiconductor device of claim 4 , further comprising a thermal interface material (TIM) between the semiconductor die and the EMI shield, wherein the TIM is configured to dissipate heat away from the semiconductor die.
6. The semiconductor device of claim 5 , wherein the EMI shield has a thickness between 30 μm and 2 mm.
7. The semiconductor device of claim 5 , wherein the TIM covers (i) an upper surface of the semiconductor die opposite the first surface of the package substrate and (ii) at least a portion of side surfaces of the semiconductor die.
8. The semiconductor device of claim 1 , further comprising a second dielectric material between the EMI shield and the antenna structure, wherein the second dielectric material is configured to separate and electrically isolate the EMI shield from the antenna structure.
9. The semiconductor device of claim 7 , wherein the second dielectric material surrounds the EMI shield such that the second dielectric material wraps around a side of the EMI shield opposite the semiconductor die thereby contacting a bottom surface of the EMI shield.
10. The semiconductor device of claim 1 , wherein the EMI shield includes iron, nickel-iron, cobalt-iron, stainless steel, and/or copper.
11. The semiconductor device of claim 1 , wherein the EMI shield is die-attached to the first surface of the package substrate.
12. The semiconductor device of claim 1 , further comprising an electrical connector formed on a second surface of the package substrate opposite the first surface, wherein the antenna structure is electrically coupled to the electrical connector via the package substrate.
13. The semiconductor device of claim 11 , wherein the electrical connector is electrically isolated from the semiconductor die.
14. The semiconductor device of claim 1 , wherein the semiconductor die is a memory die.
15. The semiconductor device of claim 1 , further comprising a package molding over the antenna structure, the EMI shield, and the first surface of the package substrate.
16. The semiconductor device of claim 1 , wherein the ground plane is a separate layer of the package substrate.
17. The semiconductor device of claim 1 , wherein the ground plane spans multiple layers of the package substrate.
18. A semiconductor device, comprising: a substrate including a ground plane embedded within and spaced apart from a first surface of the substrate, the ground plane accessible via the first surface of the substrate at a first location and accessible via the first surface at a second location different from the first location; a semiconductor die positioned over the first surface of the substrate and between the first location and the second location; a first dielectric material positioned at least in part between the semiconductor die and the first surface of the substrate; an electromagnetic interference (EMI) shield surrounding the semiconductor die and the first dielectric material, wherein the EMI shield is electrically coupled to the ground plane (a) via the first surface of the substrate at the first location and (b) via the first surface of the substrate at the second location; a second dielectric material surrounding the EMI shield; an electrical connector positioned on a second surface of the substrate opposite the first surface; and an antenna structure positioned at least in part over the second dielectric material and electrically coupled to the electrical connector through the first surface of the substrate and through the second surface of the substrate.
19. The semiconductor device of claim 18 , further comprising a thermal interface material (TIM) (i) positioned between the semiconductor die and the EMI shield and (ii) directly contacting the EMI shield and the semiconductor die.
20. A semiconductor device, comprising: a package substrate including a ground plane, the ground plane having a first portion embedded beneath a first surface of the package substrate and a second portion exposed though the first surface of the package substrate and electrically coupled to the first portion; a semiconductor die coupled to the first surface of the package substrate; an antenna structure; and an electromagnetic interference (EMI) shield at least partially positioned between the semiconductor die and the antenna structure, wherein the EMI shield is electrically coupled to the first portion of the ground plane via the second portion of the ground plane exposed through the first surface of the package substrate.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
July 29, 2019
November 16, 2021
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