Patentable/Patents/US-11211257
US-11211257

Semiconductor device fabrication with removal of accumulation of material from sidewall

PublishedDecember 28, 2021
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

A method of fabricating a semiconductor device is provided. The method includes forming a first metal layer over a semiconductor substrate, and forming a first layer over the first metal layer. The first layer and first metal layer are etched to expose a sidewall of the first layer and a sidewall of the first metal layer, wherein the etching disburses a portion of the first metal layer to create an accumulation of material on at least one of the sidewall of the first layer or the sidewall of the first metal layer. At least some of the accumulation is etched away using an etchant comprising fluorine.

Patent Claims
20 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A method for fabricating a semiconductor device, comprising: forming a first metal layer over a semiconductor substrate; forming a second metal layer over the first metal layer, wherein the second metal layer has a composition that is different than a composition of the first metal layer; etching the second metal layer and the first metal layer to expose a sidewall of the second metal layer and a sidewall of the first metal layer, wherein the etching disburses a portion of the first metal layer to create an accumulation of material on at least one of the sidewall of the second metal layer or the sidewall of the first metal layer; and etching the accumulation using an etchant comprising fluorine to remove at least some of the accumulation.

2

2. The method of claim 1 , wherein the first metal layer comprises at least one of tantalum nitride or titanium nitride.

3

3. The method of claim 1 , wherein forming the first metal layer comprises forming the first metal layer over an etch stop layer.

4

4. The method of claim 1 , comprising: forming a third metal layer over the second metal layer, wherein: forming the second metal layer comprises forming the second metal layer to contact with the first metal layer, and forming the third metal layer comprises forming the third metal layer to contact with the second metal layer.

5

5. The method of claim 4 , comprising: forming a dielectric layer over the third metal layer, and forming a fourth metal layer over the dielectric layer.

6

6. The method of claim 5 , wherein the first metal layer, the third metal layer, and the fourth metal layer have a same composition.

7

7. The method of claim 1 , wherein the etchant comprises at least one of: CF 4 , SF 6 , NF 3 , or CHF 3 .

8

8. The method of claim 1 , comprising: forming a first dielectric layer over the second metal layer; forming a third metal layer over the first dielectric layer; and forming a second dielectric layer over the third metal layer, wherein the second dielectric layer contacts the first dielectric layer.

9

9. The method of claim 8 , wherein the first dielectric layer and the second dielectric layer have a same composition.

10

10. The method of claim 8 , wherein the first metal layer and the third metal layer have a same composition.

11

11. A method for fabricating a semiconductor device, comprising: forming a first metal layer over a semiconductor substrate; forming a first dielectric layer over the first metal layer; forming a second metal layer over the first dielectric layer; forming a second dielectric layer over the second metal layer; etching the second dielectric layer, the first dielectric layer, and the first metal layer to expose a sidewall of the second dielectric layer, a sidewall of the first dielectric layer, and a sidewall of the first metal layer, wherein: a sidewall of the second metal layer is spaced apart from the sidewall of the second dielectric layer by a portion of the second dielectric layer, and the etching disburses a portion of the first metal layer to create an accumulation of material on at least one of the sidewall of the second dielectric layer, the sidewall of the first dielectric layer, or the sidewall of the first metal layer; and etching the accumulation using an etchant comprising fluorine to remove at least some of the accumulation.

12

12. The method of claim 11 , wherein the first metal layer comprises at least one of tantalum nitride or titanium nitride.

13

13. The method of claim 11 , comprising: forming a third metal layer over the first metal layer prior to forming the first dielectric layer.

14

14. The method of claim 11 , wherein the first metal layer and the second metal layer have a same composition.

15

15. The method of claim 11 , wherein the etchant comprises at least one of: CF 4 , SF 6 , NF 3 , or CHF 3 .

16

16. The method of claim 11 , wherein the first dielectric layer and the second dielectric layer have a same composition.

17

17. A method for fabricating a semiconductor device, comprising: forming a first metal layer over a semiconductor substrate; forming a first dielectric layer over the first metal layer; forming a second metal layer over the first dielectric layer; forming a second dielectric layer over the second metal layer, wherein the second dielectric layer contacts the first dielectric layer; etching the first dielectric layer and the first metal layer to expose a sidewall of the first dielectric layer and a sidewall of the first metal layer, wherein the etching disburses a portion of the first metal layer to create an accumulation of material on at least one of the sidewall of the first dielectric layer or the sidewall of the first metal layer; and etching the accumulation using an etchant comprising fluorine to remove at least some of the accumulation.

18

18. The method of claim 17 , comprising: etching the second dielectric layer to expose a sidewall of the second dielectric layer, wherein the etching of the first metal layer creates the accumulation of material on the sidewall of the second dielectric layer.

19

19. The method of claim 17 , wherein the first dielectric layer and the second dielectric layer have a same composition.

20

20. The method of claim 17 , wherein the first metal layer and the second metal layer have a same composition.

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Patent Metadata

Filing Date

July 1, 2019

Publication Date

December 28, 2021

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Cite as: Patentable. “Semiconductor device fabrication with removal of accumulation of material from sidewall” (US-11211257). https://patentable.app/patents/US-11211257

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