An integrated circuit is provided. The integrated circuit includes a first volatile memory, a second volatile memory, and a video decoder. In response to the video decoder starting video decoding on a current frame of a video stream, the video decoder reads an initial probability table for the current frame from a memory unit external to the integrated circuit, and stores the initial probability table in the first volatile memory. When a decoding phase of the current tile is completed, the video decoder complements the probability table corresponding to each row of the second volatile memory according to control flags corresponding to the rows of the first volatile memory and the second volatile memory to obtain a complete probability table, and writes the complete probability table to the memory unit.
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1. An integrated circuit, receiving a video stream, the integrated circuit comprising: a first volatile memory; a second volatile memory; and a video decoder, configured to perform video decoding on the video stream; wherein in response to the video decoder starting video decoding of a current frame of a video stream, the video decoder reads an initial probability table for a current frame of the video stream from a memory unit that is external to the integrated circuit, and stores the initial probability table in a first volatile memory, wherein the current frame is divided into a plurality of tiles, wherein in response to entering a decoding phase of a current tile of the current frame, the video decoder initializes a plurality of control flags of a plurality of rows in the first volatile memory and the second volatile memory to 0, and determines whether to read a probability table required by a decoding process from a specific row of the first volatile memory or the second volatile memory according to the control flag corresponding to the specific row of the first volatile memory and the second volatile memory, wherein the video decoder updates the probability table, writes the updated probability table into the specific row of the second volatile memory, and sets the control flag corresponding to the specific row to 1, wherein when a decoding phase of the current tile is completed, the video decoder complements the probability table corresponding to each row of the second volatile memory according to the control flags corresponding to the rows of the first volatile memory and the second volatile memory to obtain a complete probability table, and writes the complete probability table to the memory unit.
This invention relates to an integrated circuit for efficient video decoding, addressing the challenge of managing probability tables during the decoding process to reduce external memory access and improve performance. The integrated circuit includes a video decoder, a first volatile memory, and a second volatile memory. The video decoder processes a video stream by initially loading an initial probability table for a current frame from an external memory into the first volatile memory. The frame is divided into tiles, and for each tile, the decoder initializes control flags in both volatile memories to zero. During decoding, the decoder checks the control flags to determine whether to read a probability table from the first or second volatile memory. If the table is read from the first memory, it is updated, stored in the second memory, and the corresponding control flag is set to one. Once a tile is fully decoded, the decoder combines the probability tables from both memories based on the control flags to form a complete probability table, which is then written back to the external memory. This approach minimizes external memory access by leveraging internal volatile memories and control flags to track and manage probability table updates efficiently.
2. The integrated circuit as claimed in claim 1 , wherein the video stream supports AOMedia Video 1 (AV1) standard.
The invention relates to an integrated circuit designed for video processing, specifically for handling video streams encoded according to the AOMedia Video 1 (AV1) standard. AV1 is a modern video compression standard known for its high efficiency in reducing file sizes while maintaining high-quality video playback. The integrated circuit includes hardware components optimized for decoding and encoding AV1 video streams, ensuring real-time processing with low power consumption. This is particularly important for applications in mobile devices, streaming platforms, and other systems where efficient video handling is critical. The circuit may also include additional features such as support for other video codecs, hardware acceleration for video preprocessing, and interfaces for connecting to external memory or display systems. By integrating AV1 support directly into the hardware, the circuit enables devices to deliver high-quality video with reduced computational overhead, addressing the need for energy-efficient and high-performance video processing in modern electronic devices.
3. The integrated circuit as claimed in claim 1 , wherein during the decoding phase of the current frame, the video decoder uses the same initial probability table to perform decoding on each tile of the current frame.
The invention relates to video decoding in integrated circuits, specifically improving efficiency in decoding video frames divided into tiles. The problem addressed is the computational overhead and potential inefficiencies in video decoding when different probability tables are used for each tile within a frame, leading to increased processing time and resource usage. The solution involves using a single, shared initial probability table for decoding all tiles of a current video frame during the decoding phase. This approach reduces the need to generate or load separate probability tables for each tile, streamlining the decoding process and conserving computational resources. The integrated circuit includes a video decoder configured to apply this shared probability table uniformly across all tiles, ensuring consistent and efficient decoding. The method involves initializing the probability table before decoding begins and reusing it for each tile, eliminating redundant calculations. This technique is particularly useful in high-efficiency video coding (HEVC) or similar standards where tiles are used to enable parallel processing. The invention enhances decoding speed and reduces power consumption by minimizing the overhead associated with probability table management.
4. The integrated circuit as claimed in claim 1 , wherein during the decoding phase of the current frame, the video decoder determines a value of the control flag corresponding to a specific row where the probability table required for the decoding process of the current tile is located, wherein when the video decoder determines that the control flag corresponding to the specific row is 0, the video decoder reads the required probability table from the specific row of the first volatile memory, wherein when the video decoder determines that the control flag corresponding to the specific row is 1, the video decoder reads the required probability table from the specific row of the second volatile memory.
This invention relates to video decoding in integrated circuits, specifically optimizing memory access for probability tables used during the decoding process. The problem addressed is the efficient retrieval of probability tables required for decoding video frames, particularly in systems where multiple volatile memory units are available. The invention involves an integrated circuit with at least two volatile memory units storing probability tables for video decoding. During the decoding phase of a current video frame, the video decoder determines a control flag value associated with a specific memory row where the required probability table is stored. If the control flag is 0, the decoder reads the table from the first volatile memory. If the control flag is 1, the decoder reads the table from the second volatile memory. This dual-memory approach allows for flexible and efficient access to probability tables, improving decoding performance by reducing latency or optimizing memory usage. The control flag mechanism ensures the decoder selects the correct memory source dynamically, adapting to system conditions or memory states. The invention enhances video decoding efficiency by minimizing unnecessary memory access delays and optimizing resource utilization.
5. The integrated circuit as claimed in claim 1 , wherein when the decoding phase of the current tile is completed, the video decoder further determines a value of the control flag corresponding to each row of the first volatile memory and the second volatile memory, and copies initial probability table data stored in each row having a control flag of 0 in the first volatile memory to each corresponding row in the second volatile memory to obtain the complete probability table.
This invention relates to video decoding in integrated circuits, specifically improving the efficiency of probability table management in video decoders. The problem addressed is the need to reconstruct a complete probability table from partial data stored in volatile memory during the decoding process, particularly in systems using multiple memory banks or tiles. The solution involves a method to selectively copy initial probability table data from a first volatile memory to a second volatile memory based on control flags, ensuring the complete probability table is accurately reconstructed after decoding a tile. The integrated circuit includes a video decoder with first and second volatile memories, each storing rows of probability table data. During the decoding phase of a current tile, the decoder determines the value of a control flag for each row in both memories. Rows with a control flag of 0 in the first memory are identified, and their initial probability table data is copied to corresponding rows in the second memory. This process ensures that the complete probability table is reconstructed by combining data from both memories, optimizing memory usage and decoding efficiency. The control flags act as indicators to determine which rows require copying, preventing unnecessary data transfers and reducing processing overhead. This approach is particularly useful in video decoding applications where memory bandwidth and latency are critical factors.
6. The integrated circuit as claimed in claim 1 , wherein when the video decoder enables a function of referencing a cross-frame probability table, the completed probability table written to the memory unit by the video decoder is used for the decoding process of a subsequent frame next to the current frame.
This invention relates to video decoding in integrated circuits, specifically improving efficiency by reusing probability tables across frames. The problem addressed is the computational overhead of repeatedly generating probability tables for each frame, which consumes processing resources and memory bandwidth. The solution involves an integrated circuit with a video decoder that can enable a cross-frame probability table referencing function. When this function is activated, the probability table generated and stored in a memory unit during the decoding of a current frame is reused for decoding the subsequent adjacent frame. This reduces redundant calculations, lowers power consumption, and improves decoding speed. The memory unit stores the completed probability table, which the video decoder accesses for the next frame's decoding process. The system ensures compatibility with existing video coding standards by dynamically enabling or disabling the cross-frame referencing based on encoding constraints or decoder capabilities. This approach optimizes resource utilization without compromising decoding accuracy, making it suitable for real-time applications in mobile devices, streaming platforms, and embedded systems.
7. A method of storing probability tables for video decoding for use in an integrated circuit, wherein the integrated circuit comprises a first volatile memory and a second volatile memory, the method comprising: in response to starting video decoding of a current frame of a video stream, reading an initial probability table for a current frame of the video stream from a memory unit that is external to the integrated circuit, and storing the initial probability table in a first volatile memory, wherein the current frame is divided into a plurality of tiles; in response to entering a decoding phase of a current tile of the current frame, initializing a plurality of control flags of a plurality of rows in the first volatile memory and the second volatile memory to 0, and determining whether to read a probability table required by a decoding process from a specific row of the first volatile memory or the second volatile memory according to the control flag corresponding to the specific row of the first volatile memory and the second volatile memory; updating the probability table, writing the updated probability table into the specific row of the second volatile memory, and setting the control flag corresponding to the specific row to 1; and when a decoding phase of the current tile is completed, complementing the probability table corresponding to each row of the second volatile memory according to the control flags corresponding to the rows of the first volatile memory and the second volatile memory to obtain a complete probability table, and writing the complete probability table to the memory unit.
This invention relates to efficient storage and management of probability tables used in video decoding within an integrated circuit. The problem addressed is the need to optimize memory usage and access speed during video decoding, particularly when handling large probability tables that are frequently updated. The solution involves a method that leverages two volatile memory units within the integrated circuit to manage these tables dynamically. The method begins by loading an initial probability table for a current video frame from an external memory into a first volatile memory. The frame is divided into multiple tiles, and for each tile, the method initializes control flags in both volatile memories to zero. During decoding, the method checks these flags to determine whether to read a required probability table from the first or second volatile memory. If the table is updated, it is written to the second volatile memory, and the corresponding flag is set to one. Once a tile is fully decoded, the method combines the updated and original probability tables based on the control flags to form a complete table, which is then written back to the external memory. This approach reduces redundant memory access and ensures efficient updates during the decoding process.
8. The method as claimed in claim 7 , wherein the video stream supports AOMedia Video 1 (AV1) standard.
The invention relates to video streaming technology, specifically addressing the need for efficient and high-quality video transmission over networks. The method involves encoding and transmitting a video stream using the AOMedia Video 1 (AV1) standard, which is designed to improve compression efficiency and reduce bandwidth requirements compared to older codecs. The video stream is processed to optimize encoding parameters, such as bitrate, resolution, and frame rate, to ensure compatibility with various network conditions and playback devices. The method also includes adaptive bitrate streaming techniques to dynamically adjust the video quality based on available bandwidth, ensuring smooth playback without buffering. Additionally, the system may incorporate error correction mechanisms to handle packet loss and network disruptions, maintaining video integrity during transmission. The AV1 standard is particularly advantageous for high-definition and ultra-high-definition video content, as it provides superior compression while preserving visual quality. This approach is beneficial for applications such as video-on-demand, live streaming, and video conferencing, where efficient bandwidth usage and high-quality playback are critical. The method ensures that video content is delivered seamlessly across different devices and network environments, enhancing the user experience.
9. The method as claimed in claim 7 , further comprising: during the decoding phase of the current frame, using the same initial probability table to perform decoding on each tile of the current frame.
This invention relates to video decoding, specifically improving efficiency in decoding frames divided into tiles. The problem addressed is the computational overhead and inconsistency in decoding performance when different probability tables are used for each tile within a video frame. Traditional methods often recalculate or adjust probability tables for each tile, leading to redundant processing and potential inconsistencies in decoded output. The solution involves using a single, pre-determined initial probability table for decoding all tiles within a current frame during the decoding phase. This approach ensures uniformity and reduces computational load by eliminating the need to recalculate or adjust probability tables for each tile. The initial probability table is derived from a prior frame or a reference frame, ensuring that the decoding process remains consistent and efficient. By applying the same table across all tiles, the method minimizes processing time and maintains coherence in the decoded video output. This technique is particularly useful in high-efficiency video coding (HEVC) or similar standards where tiles are used to enable parallel processing and improve decoding flexibility. The invention enhances decoding speed and resource utilization without compromising video quality.
10. The method as claimed in claim 7 , further comprising: during the decoding phase of the current frame, determining a value of the control flag corresponding to a specific row where the probability table required for the decoding process of the current tile is located; when it is determined that the control flag corresponding to the specific row is 0, reading the required probability table from the specific row of the first volatile memory; and when it is determined that the control flag corresponding to the specific row is 1, reading the required probability table from the specific row of the second volatile memory.
This invention relates to video decoding systems, specifically optimizing memory access for probability tables used in decoding processes. The problem addressed is the inefficient retrieval of probability tables during video decoding, which can slow down processing and increase power consumption. The solution involves a dual-memory system with a control flag mechanism to dynamically select between two volatile memory sources for accessing probability tables during frame decoding. The system includes a first and second volatile memory, each storing probability tables for different tiles or regions of a video frame. During the decoding phase of a current frame, the system determines a control flag value associated with a specific row in memory where the required probability table is stored. If the control flag is 0, the system reads the table from the corresponding row in the first volatile memory. If the control flag is 1, it reads from the second volatile memory. This allows the system to switch between memory sources based on predefined conditions, such as memory availability, access speed, or power efficiency, improving overall decoding performance. The control flag can be set dynamically during operation or preconfigured based on system requirements. This approach reduces latency and optimizes resource usage by leveraging dual memory access paths for probability tables.
11. The method as claimed in claim 7 , further comprising: when the decoding phase of the current tile is completed, determining a value of the control flag corresponding to each row of the first volatile memory and the second volatile memory, and copying initial probability table data stored in each row having the control flag of 0 in the first volatile memory to each corresponding row in the second volatile memory to obtain the complete probability table.
This invention relates to a method for managing probability tables in a video decoding system, specifically addressing the challenge of efficiently updating and maintaining probability tables during the decoding of video tiles. The method involves using two volatile memory units to store probability table data, where one memory unit holds the current working data while the other stores initial or updated values. During the decoding phase of a tile, the system tracks which rows of the probability tables in the first memory have been modified by setting a control flag. Once the decoding phase is complete, the system evaluates the control flags for each row in both memories. For rows where the control flag is set to 0 (indicating no modification), the initial probability table data from the first memory is copied to the corresponding rows in the second memory. This ensures that the second memory contains a complete and updated probability table, incorporating both modified and unmodified data. The approach optimizes memory usage and reduces redundant computations by selectively updating only the necessary portions of the probability tables, improving decoding efficiency.
12. The method as claimed in claim 7 , when a function of referencing a cross-frame probability table is enabled, the completed probability table written to the memory unit is used for the decoding process of a subsequent frame next to the current frame.
This invention relates to video decoding systems that use probability tables to improve compression efficiency. The problem addressed is the inefficiency in decoding subsequent video frames when cross-frame probability tables are not utilized, leading to redundant computations and slower processing. The method involves generating a completed probability table during the decoding of a current video frame. This table contains statistical data about symbol probabilities, which is essential for entropy decoding. When a cross-frame referencing function is enabled, the completed probability table from the current frame is stored in a memory unit. This stored table is then reused for decoding the next adjacent frame, eliminating the need to recompute probabilities from scratch. This approach reduces computational overhead and improves decoding speed, particularly in scenarios where frames share similar statistical characteristics. The memory unit can be any storage medium capable of retaining the probability table between frames, such as on-chip cache or external memory. The method ensures that the table is accurately transferred and applied to the subsequent frame, maintaining decoding accuracy while enhancing efficiency. This technique is particularly useful in real-time video applications where processing speed is critical.
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October 23, 2020
March 8, 2022
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