Patentable/Patents/US-11287842
US-11287842

Time synchronization for clocks separated by a communication link

PublishedMarch 29, 2022
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

Systems and methods for time synchronization for clocks separated by a communication link allow a master clock to be positioned at a downstream-facing port or an upstream-facing port and to send synchronization commands with an associated time stamp embedded in transport layer protocol (TLP) prefixes to a slave clock. The slave clock may update its time value based on the received time stamp. Further, the slave may calculate a round trip delay between the master clock and the slave clock and use this delay calculation to correct the slave clock. The delay calculation may likewise be made using TLP prefixes. By using TLP prefixes in this fashion, the time synchronization can piggyback on existing message traffic, which reduces signaling overhead. Likewise, by using the TLP prefixes, the time synchronization may be initiated from either an upstream-facing port or a downstream-facing port.

Patent Claims
19 claims

Legal claims defining the scope of protection. Each claim is shown in both the original legal language and a plain English translation.

Claim 1

Original Legal Text

1. A method of synchronizing a clock across a communication link, comprising: sending a synchronization command from a master through a Peripheral Component Interconnect (PCI) express (PCIE) link to a slave, wherein the synchronization command comprises a packet prefix and the packet prefix contains a master clock time stamp; and receiving a correction command from a bridge on the PCIE link.

Plain English Translation

A method synchronizes clocks across a Peripheral Component Interconnect Express (PCIe) link by transmitting a synchronization command from a master device to a slave device. The synchronization command includes a packet prefix containing a timestamp from the master device's clock. The slave device uses this timestamp to adjust its local clock, ensuring alignment with the master. Additionally, a bridge on the PCIe link sends a correction command to further refine synchronization accuracy. This method addresses clock drift and timing discrepancies in high-speed communication systems where precise time alignment is critical, such as in data centers, telecommunications, or distributed computing environments. The use of PCIe infrastructure leverages existing hardware for synchronization, reducing the need for dedicated timing hardware. The correction command from the bridge provides an additional layer of adjustment, compensating for transmission delays and other variables that may affect synchronization accuracy. This approach ensures reliable and precise timekeeping across interconnected devices, improving system performance and coordination.

Claim 2

Original Legal Text

2. The method of claim 1 , wherein sending the synchronization command comprises prepending a transport layer protocol (TLP) prefix to a TLP frame.

Plain English Translation

A method for synchronizing data transmission in a communication system involves sending a synchronization command to ensure proper alignment of data frames between transmitting and receiving devices. The synchronization command is structured by prepending a Transport Layer Protocol (TLP) prefix to a TLP frame. The TLP prefix contains synchronization information that allows the receiving device to detect and correct any misalignment in the data stream, ensuring reliable communication. This method is particularly useful in high-speed data transmission systems where maintaining frame alignment is critical for error-free data transfer. The TLP prefix may include synchronization patterns or markers that help the receiver identify the start of a new frame, even if previous frames were corrupted or lost. By embedding synchronization information directly within the TLP frame structure, the method reduces the need for separate synchronization signals, simplifying the communication protocol and improving efficiency. This approach is applicable in various communication technologies, including but not limited to, PCI Express, Ethernet, and other high-speed serial interfaces. The method ensures robust synchronization without requiring additional hardware or complex synchronization mechanisms, making it suitable for both wired and wireless communication systems.

Claim 3

Original Legal Text

3. The method of claim 1 , further comprising receiving a delay command from the slave.

Plain English Translation

A system and method for managing communication delays in a master-slave network architecture, particularly in industrial automation or distributed control systems, addresses the challenge of ensuring synchronized operations between a master controller and multiple slave devices. The system involves a master device that transmits a synchronization signal to one or more slave devices to coordinate their actions. The slaves respond with status updates or data, but network latency or processing delays can disrupt synchronization. To mitigate this, the master device monitors the timing of received responses from the slaves and adjusts its operations accordingly. Additionally, the system includes a mechanism for the slaves to send a delay command to the master, instructing it to pause or adjust its operations to accommodate processing or transmission delays on the slave side. This ensures that the master does not proceed with subsequent commands until the slave is ready, preventing data loss or misalignment in the system. The method enhances reliability in time-sensitive applications by dynamically compensating for variable delays in the network.

Claim 4

Original Legal Text

4. The method of claim 3 , further comprising, responsive to receiving the delay command, sending a second delay command to the slave.

Plain English Translation

A system and method for managing communication delays in a master-slave network architecture, particularly in industrial automation or distributed control systems where precise timing is critical. The problem addressed is ensuring synchronized operation between a master device and one or more slave devices when delays are introduced, such as during system initialization, reconfiguration, or fault recovery. The invention provides a mechanism to propagate delay commands from the master to the slave devices to maintain coordination and prevent disruptions in synchronized operations. The method involves the master device issuing a delay command to one or more slave devices to temporarily halt or adjust their operations. Upon receiving the delay command, the master device then sends a second delay command to the slave device to further extend or modify the delay period. This ensures that the slave device remains in a synchronized state with the master device, preventing timing errors or data inconsistencies. The delay commands may include timing parameters, synchronization signals, or other control instructions to coordinate the slave device's response. The system may be used in applications such as industrial controllers, communication networks, or distributed computing environments where precise timing and synchronization are essential. The method ensures that delays are managed in a controlled manner, maintaining system stability and performance.

Claim 5

Original Legal Text

5. The method of claim 4 , wherein sending the second delay command to the slave comprises prepending a prefix to a packet.

Plain English Translation

A system and method for synchronizing timing in a network of devices, particularly in applications requiring precise time coordination such as telecommunications, industrial automation, or distributed computing. The problem addressed is the need for accurate time synchronization between a master device and one or more slave devices, where delays in communication can introduce timing errors. The invention provides a technique to compensate for these delays by dynamically adjusting timing commands sent from the master to the slaves. The method involves sending a first delay command from the master to a slave device, where the first delay command includes a time adjustment value to correct for propagation delays. The slave device then sends a response back to the master, allowing the master to measure the round-trip delay and calculate a more precise compensation value. The master then sends a second delay command to the slave, which includes an updated time adjustment value. To ensure proper processing, the second delay command is formatted by prepending a specific prefix to the packet, distinguishing it from other types of packets and ensuring the slave device correctly interprets the command. This prefix may include synchronization markers or identifiers that the slave recognizes as part of the timing adjustment protocol. The method ensures that the slave device applies the correct time adjustment, minimizing synchronization errors in the network.

Claim 6

Original Legal Text

6. The method of claim 5 , wherein prepending the prefix to the packet comprises prepending a transport layer protocol (TLP) prefix to a TLP packet.

Plain English Translation

This invention relates to network communication protocols, specifically methods for modifying packet headers to enhance routing or processing efficiency. The problem addressed involves optimizing packet handling in high-speed networks by prepending additional protocol-specific prefixes to existing packets. The method involves modifying a packet by adding a transport layer protocol (TLP) prefix to a TLP packet. This prefix may contain metadata or routing information that improves packet processing, reduces latency, or enables specialized handling by network devices. The TLP prefix is structured to comply with transport layer protocol standards, ensuring compatibility with existing network infrastructure while introducing new functionality. The method may be applied in scenarios where packets require additional context or prioritization, such as in data center networks, high-performance computing, or real-time communication systems. The invention aims to streamline packet processing by embedding relevant information directly in the packet header, reducing the need for external lookups or additional processing steps. This approach enhances network efficiency and scalability without requiring significant changes to underlying protocols or hardware.

Claim 7

Original Legal Text

7. The method of claim 4 , wherein sending the second delay command comprises sending a second master clock time stamp to the slave with the second delay command.

Plain English Translation

A system and method for synchronizing clocks in a network involves a master device and one or more slave devices. The master device generates timing signals to synchronize the slave devices, ensuring accurate timekeeping across the network. The synchronization process includes sending delay commands from the master to the slave devices to adjust their clocks based on measured time differences. To improve synchronization accuracy, the master device sends a second delay command that includes a second master clock timestamp. This timestamp provides the slave device with the exact time at which the master device generated the second delay command, allowing the slave to compensate for transmission delays and other timing discrepancies. The inclusion of the timestamp in the second delay command enables more precise clock adjustments, reducing synchronization errors and improving overall network timing performance. This method is particularly useful in applications requiring high-precision time synchronization, such as telecommunications, financial transactions, and industrial automation.

Claim 8

Original Legal Text

8. A master device comprising: a link interface configured to couple to a Peripheral Component Interconnect (PCI) express (PCIE) link; a master clock; and a control system operatively coupled to the link interface and the master clock, the control system configured to: send a synchronization command to a slave through the PCIE link, wherein the synchronization command comprises a packet prefix and the packet prefix contains a master clock time stamp; and receive a correction command from a bridge on the PCIE link.

Plain English Translation

A master device is designed to synchronize timing across a Peripheral Component Interconnect Express (PCIe) network. The device addresses challenges in maintaining precise time alignment between distributed components in high-speed data systems, where clock drift and latency can disrupt synchronization. The master device includes a link interface for connecting to a PCIe link, a master clock to provide a reference time, and a control system that manages synchronization operations. The control system sends a synchronization command to a slave device over the PCIe link, where the command includes a packet prefix containing a timestamp from the master clock. This timestamp allows the slave device to adjust its local time to match the master clock. Additionally, the control system receives a correction command from a bridge on the PCIe link, which may provide adjustments to further refine synchronization accuracy. The system ensures consistent timing across multiple devices, improving data integrity and coordination in high-performance computing and communication applications.

Claim 9

Original Legal Text

9. The master device of claim 8 , wherein the synchronization command comprises a transport layer protocol (TLP) prefix attached to a TLP frame.

Plain English Translation

A system for synchronizing data transmission in a computing environment involves a master device that coordinates timing and data exchange between multiple devices. The master device generates and transmits synchronization commands to ensure consistent data transfer across interconnected components. These synchronization commands include a transport layer protocol (TLP) prefix attached to a TLP frame, which facilitates precise timing and alignment of data transactions. The TLP prefix contains control information that helps manage the synchronization process, while the TLP frame carries the actual data payload. This approach ensures reliable and efficient data synchronization in high-speed communication systems, particularly in environments where multiple devices must operate in unison. The master device may also monitor the synchronization status of connected devices and adjust timing parameters as needed to maintain optimal performance. This method is particularly useful in systems requiring low-latency and high-throughput data transfers, such as high-performance computing or real-time data processing applications.

Claim 10

Original Legal Text

10. The master device of claim 8 , wherein the control system is further configured to receive a delay command from the slave.

Plain English Translation

A system for managing communication between a master device and one or more slave devices in a networked environment addresses the challenge of coordinating data transmission and processing delays. The master device includes a control system that regulates communication with the slave devices, ensuring synchronized operations. The control system is designed to receive and process commands from the slave devices, including a delay command. When a slave device sends a delay command, the master device's control system adjusts its operations to account for the specified delay, allowing for precise timing and coordination between devices. This feature is particularly useful in applications requiring strict timing control, such as industrial automation, robotics, or real-time data processing systems. The system ensures that the master device can dynamically respond to timing adjustments requested by the slave devices, maintaining efficient and synchronized communication across the network. The control system's ability to receive and act on delay commands enhances the flexibility and reliability of the overall system, enabling seamless integration and operation in time-sensitive applications.

Claim 11

Original Legal Text

11. The master device of claim 8 , wherein the control system is configured to send a response including the correction command.

Plain English Translation

A system for managing a network of devices includes a master device that coordinates operations among multiple slave devices. The master device monitors the performance of the slave devices and detects deviations from expected behavior. When a deviation is identified, the master device generates a correction command to adjust the operation of the affected slave device. The correction command may include instructions to modify parameters, adjust settings, or initiate corrective actions. The master device also includes a control system that processes the correction command and sends a response to the slave device. The response includes the correction command itself, ensuring the slave device receives the necessary instructions to resolve the deviation. This system improves coordination and efficiency in device networks by enabling real-time adjustments to maintain optimal performance. The control system may also log the correction actions for monitoring and analysis, allowing for continuous improvement of the network's operation. The master device's ability to detect deviations and issue corrective commands enhances reliability and reduces downtime in automated systems.

Claim 12

Original Legal Text

12. A slave device comprising: a link interface configured to couple to a Peripheral Component Interconnect (PCI) express (PCIE) link; a slave clock; and a control system operatively coupled to the link interface and the slave clock, the control system configured to: receive a synchronization command from a master through the PCIE link, wherein the synchronization command comprises a packet prefix and the packet prefix contains a master clock time stamp; and. receive a correction command from a bridge on the PCIE link.

Plain English Translation

A slave device is designed for use in a Peripheral Component Interconnect Express (PCIe) system to synchronize with a master device and a bridge. The device includes a link interface that connects to a PCIe link, allowing communication with other components. A slave clock is integrated to track time locally. A control system manages operations by interfacing with both the link interface and the slave clock. The control system is configured to receive a synchronization command from a master device via the PCIe link. This command includes a packet prefix containing a master clock timestamp, which the slave device uses to align its internal clock with the master. Additionally, the control system receives a correction command from a bridge on the PCIe link, which adjusts the slave clock to maintain precise synchronization. This setup ensures accurate timing coordination between the slave device and other components in the PCIe system, addressing issues related to clock drift and timing discrepancies in high-speed data transfers. The device is particularly useful in applications requiring precise synchronization, such as data centers, high-performance computing, and real-time systems.

Claim 13

Original Legal Text

13. The slave device of claim 12 , wherein the control system is further configured to update the slave clock based on the master clock time stamp.

Plain English Translation

A system for synchronizing clocks in a distributed network involves a master device and one or more slave devices. The master device generates a master clock signal and periodically transmits time stamps derived from the master clock to the slave devices. Each slave device includes a control system that receives the master clock time stamps and adjusts its local slave clock to match the master clock. The synchronization process accounts for transmission delays to ensure accurate time alignment across the network. The control system in the slave device is configured to update the slave clock based on the received master clock time stamps, ensuring that the slave clock remains synchronized with the master clock over time. This synchronization is critical for applications requiring precise timing, such as industrial automation, telecommunications, and distributed computing systems. The system may also include mechanisms to compensate for network latency and clock drift, further improving synchronization accuracy. The slave device's control system processes the time stamps to adjust the slave clock, maintaining consistency with the master clock despite potential variations in network conditions.

Claim 14

Original Legal Text

14. The slave device of claim 12 , wherein the control system is further configured to send a delay command to the master through the PCIE link.

Plain English Translation

A system for managing data transfer between a master device and a slave device in a computing environment, particularly in high-performance computing or data processing applications where synchronization and timing are critical. The problem addressed is ensuring precise timing and coordination between devices to prevent data corruption or processing delays, especially in scenarios where the slave device must delay its operations to align with the master device's timing requirements. The slave device includes a control system that monitors and regulates data transfer operations. The control system is configured to send a delay command to the master device through a PCI Express (PCIe) link. This delay command instructs the master device to pause or adjust its operations, allowing the slave device to synchronize its activities with the master's timing. The control system may also include mechanisms to detect timing mismatches or errors and initiate corrective actions, such as adjusting transfer rates or reconfiguring communication protocols. The PCIe link provides a high-speed, low-latency communication channel for transmitting the delay command and other control signals between the devices. This ensures that timing adjustments are made efficiently without disrupting the overall system performance. The system may be used in applications such as high-frequency trading, real-time data processing, or distributed computing environments where precise synchronization is essential.

Claim 15

Original Legal Text

15. The slave device of claim 14 , wherein the delay command comprises a prefix prepended to a packet sent to the master.

Plain English Translation

A system for managing communication delays in a master-slave device network involves a slave device that receives a delay command from a master device. The delay command includes a prefix added to a data packet transmitted from the master to the slave. The slave device processes this prefix to determine a delay period before responding to the master. The delay command may specify a fixed delay, a variable delay based on network conditions, or a dynamic delay adjusted in real-time. The slave device may also include a delay module that interprets the prefix and enforces the specified delay, ensuring synchronized communication within the network. This system is particularly useful in industrial automation, sensor networks, or other applications where precise timing and coordination between devices are critical. The delay mechanism helps prevent data collisions, reduces latency, and improves overall system efficiency by allowing the master to control when slave devices transmit responses. The slave device may further include a timing circuit to track the delay period and a communication interface to receive and transmit packets with the master. The system may also support multiple delay profiles, allowing the master to adjust communication timing dynamically based on changing network demands.

Claim 16

Original Legal Text

16. The slave device of claim 14 , wherein the control system is configured to receive a second delay command from the master.

Plain English Translation

A system for managing communication delays in a master-slave device architecture involves a slave device with a control system that adjusts timing based on commands from a master device. The slave device includes a communication interface for exchanging data with the master and a control system that processes received commands. The control system is configured to receive a first delay command from the master, which specifies a time delay for the slave device to wait before responding to subsequent commands. The control system applies this delay to synchronize operations between the master and slave devices, ensuring proper timing alignment in data transmission or processing tasks. Additionally, the control system can receive a second delay command from the master, which may modify or override the previously set delay. This allows dynamic adjustment of timing parameters to accommodate varying operational conditions or optimize performance. The system is particularly useful in applications requiring precise coordination between multiple devices, such as industrial automation, sensor networks, or distributed computing systems. The ability to adjust delays on demand enhances flexibility and reliability in time-sensitive operations.

Claim 17

Original Legal Text

17. The slave device of claim 16 , wherein the control system is configured to calculate a delay correction based on a time that the delay command was sent and a time that the second delay command was received.

Plain English Translation

This invention relates to a slave device in a distributed control system, particularly for synchronizing operations across multiple devices with precise timing. The problem addressed is ensuring accurate timing alignment in systems where delays in command transmission and processing can cause synchronization errors. The slave device includes a control system that receives delay commands from a master controller and adjusts its operations accordingly. The control system calculates a delay correction by comparing the time a delay command was sent with the time a subsequent delay command was received. This correction compensates for transmission delays, ensuring that the slave device operates in sync with other devices in the system. The control system may also include a delay measurement module to track command transmission times and a correction module to apply the calculated delay correction. The slave device may further include a communication interface for receiving commands and a processing unit to execute the corrected timing adjustments. This approach improves synchronization accuracy in distributed control systems, which is critical for applications like industrial automation, telecommunications, and sensor networks where precise timing is essential.

Claim 18

Original Legal Text

18. The slave device of claim 17 , wherein the control system is further configured to correct the slave clock with the delay correction.

Plain English Translation

A system for synchronizing a slave device with a master device in a network involves a control system that adjusts the slave device's clock to match the master device's clock. The control system measures the time delay between the master and slave devices and applies a delay correction to the slave clock to compensate for this delay. This synchronization ensures accurate timing across the network, which is critical for applications requiring precise coordination, such as telecommunications, industrial automation, and distributed computing. The control system may use various synchronization protocols, such as Precision Time Protocol (PTP) or Network Time Protocol (NTP), to determine the time difference and calculate the necessary correction. The delay correction accounts for factors like network latency, processing delays, and other sources of timing inaccuracies. By continuously monitoring and adjusting the slave clock, the system maintains synchronization even under varying network conditions. This approach improves the reliability and performance of time-sensitive operations in distributed systems.

Claim 19

Original Legal Text

19. The slave device of claim 12 integrated into a device selected from the group consisting of: a set top box; an entertainment unit; a navigation device; a communications device; a fixed location data unit; a mobile location data unit; a global positioning system (GPS) device; a mobile phone; a cellular phone; a smart phone; a session initiation protocol (SIP) phone; a tablet; a phablet; a server; a computer; a portable computer; a mobile computing device; a wearable computing device; a desktop computer; a personal digital assistant (PDA); a monitor; a computer monitor; a television; a tuner; a radio; a satellite radio; a music player; a digital music player; a portable music player; a digital video player; a video player; a digital video disc (DVD) player; a portable digital video player; an automobile; a vehicle component; avionics systems; a drone; and a multicopter.

Plain English Translation

This invention relates to a slave device integrated into various electronic and computing devices to enhance functionality. The slave device is designed to operate in conjunction with a master device, enabling synchronized data processing, communication, or control operations. The slave device includes a processing unit, memory, and communication interfaces to interact with the master device and other components within the host device. It may also include specialized hardware or software modules to perform specific tasks, such as data encryption, signal processing, or user interface management. The slave device is integrated into a wide range of devices, including set-top boxes, entertainment units, navigation devices, communication devices, fixed and mobile location data units, GPS devices, mobile phones, smart phones, tablets, servers, computers, wearable computing devices, monitors, televisions, music and video players, automobiles, vehicle components, avionics systems, drones, and multicopters. The integration allows these devices to leverage the slave device's capabilities for improved performance, security, or user experience. The slave device may also support wireless or wired communication protocols to facilitate seamless interaction with the master device and other external systems. This integration enhances the functionality of the host device while maintaining compatibility with existing hardware and software architectures.

Classification Codes (CPC)

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Patent Metadata

Filing Date

July 13, 2020

Publication Date

March 29, 2022

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Time synchronization for clocks separated by a communication link