The present disclosure provides for a semiconductor device package and a method for manufacturing the same. The semiconductor device package includes a substrate, a conductive element and conductive layers. The substrate has a first surface, a second surface opposite to the first surface and a lateral surface extending between the first surface and the second surface. The conductive element is disposed on the first surface of the substrate. The conductive layers have a first portion on the conductive element and a second portion on the lateral surface of the substrate. A number of layers of the first portion of the conductive layers is different from a number of layers of the second portion of the conductive layers.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A semiconductor device package, comprising a substrate having a first surface, a second surface opposite to the first surface and a lateral surface extending between the first surface and the second surface; a conductive element disposed on the first surface of the substrate; a first package body disposed over the first surface of the substrate, an anti-oxidation protective layer in contact with a top surface of the first package body and the conductive element, wherein the anti-oxidation protection layer has a plurality of openings; and a first conductive layer in contact with a lateral surface of the first package body, wherein the first conductive layer comprises a plurality of protrusions filled in the plurality of openings of the anti-oxidation protection layer.
2. The semiconductor device package of claim 1 , wherein the first conductive layer is a seed layer and disposed on the anti-oxidation protective layer and on the lateral surface of the substrate, the anti-oxidation protective layer and the first conductive layer define an interface, and the first conductive layer is spaced apart from the conductive element by the anti-oxidation protective layer.
3. The semiconductor device package of claim 1 , wherein the first conductive layer is in contact with a top surface and a lateral surface of the anti-oxidation protective layer.
4. The semiconductor device package of claim 1 , further comprising: a first electronic component disposed on the first surface of the substrate; and a second electronic component disposed on the first surface of the substrate and separated from the first electronic component by the conductive element.
5. The semiconductor device package of claim 4 , wherein the first package body covers the first electronic component, the second electronic component and a portion of the conductive element, and a top surface of the conductive element is exposed from the first package body to contact the anti-oxidation protective layer.
6. The semiconductor device package of claim 5 , wherein a lateral surface of the anti-oxidation protective layer is substantially coplanar with the lateral surface of the first package body.
7. The semiconductor device package of claim 4 , further comprising: a third electronic component disposed on the second surface of the substrate; and a second package body disposed on the second surface of the substrate and at least partially covering the third electronic component.
8. The semiconductor device package of claim 4 , wherein the conductive element is adjacent to at least two lateral surfaces of the first electronic component and the second electronic component.
9. The semiconductor device package of claim 1 , wherein the plurality of protrusions of the first conductive layer extend into a plurality of recesses of the first package body.
10. A semiconductor device package, comprising a substrate having a first surface, a second surface opposite to the first surface and a lateral surface extending between the first surface and the second surface; a conductive element disposed on the first surface of the substrate; conductive layers disposed on the conductive element and the lateral surface of the substrate, the conductive layers comprising an anti-oxidation protective layer disposed on the conductive element and spaced apart from the lateral surface of the substrate, wherein the anti-oxidation protection layer has a plurality of openings; and a first package body disposed over the first surface of the substrate, wherein the conductive layers further comprise a first conductive layer in contact with a lateral surface of the first package body, and the anti-oxidation protective layer is in contact with a top surface of the first package body and the conductive element, wherein a resistance between the second surface of the substrate and the conductive layers is in a range from 0.0080 hm to 0.080 hm, and wherein the first conductive layer comprises a plurality of protrusions filled in the plurality of openings of the anti-oxidation protection layer.
11. The semiconductor device package of claim 10 , wherein the first conductive layer is disposed on the anti-oxidation protective layer and on the lateral surface of the substrate, and the anti-oxidation protective layer and the first conductive layer define an interface.
12. The semiconductor device package of claim 11 , wherein the first package body covers a portion of the conductive element, and a top surface of the conductive element is exposed from the first package body to contact with the anti-oxidation protective layer.
13. The semiconductor device package of claim 12 , wherein the first conductive layer comprises a portion penetrating through the anti-oxidation protective layer and extending within a recess of the first package body.
14. The semiconductor device package of claim 10 , wherein the resistance between the second surface of the substrate and the conductive layers is equal to or smaller than 0.068 Ohm.
15. The semiconductor device package of claim 14 , wherein the resistance between the second surface of the substrate and the conductive layers is equal to or greater than about 0.021 Ohm.
16. The semiconductor device package of claim 10 , further comprising: a first electronic component disposed on the first surface of the substrate; a second electronic component disposed on the first surface of the substrate and separated from the first electronic component by the conductive element; a third electronic component disposed on the second surface of the substrate; and a second package body disposed on the second surface of the substrate and at least partially covering the third electronic component.
17. A method of manufacturing a semiconductor device package, comprising: (a) forming a conductive element on a first surface of a substrate; (b) forming an anti-oxidation protective layer in contact with a top surface of the conductive element, wherein the anti-oxidation protection layer has a plurality of openings; (c) forming a first electronic component on a second surface of the substrate opposite to the first surface of the substrate; and (d) forming a conductive layer on the anti-oxidation protective layer, and wherein the conductive layer comprises a plurality of protrusions filled in the plurality of openings of the anti-oxidation protection layer.
18. The method of claim 17 , further comprising: prior to operation (b), forming a first package body to cover a portion of the conductive element and to expose the top surface of the conductive element.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
May 14, 2020
April 12, 2022
Browse 5M+ US patents with plain-English claim translations and AI-generated analysis.