Patentable/Patents/US-11313882
US-11313882

Battery management system, battery pack including same, and method for determining failure in current detecting circuit

PublishedApril 26, 2022
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

A battery management system, a battery pack including same and a method for determining a failure in a current detecting circuit. The system includes the current detecting circuit configured to detect a reference current representing a current flowing through a high current path of the battery pack, a bidirectional switch including a charging FET and a discharging FET installed on the high current path, and a control unit. The control unit detects a first voltage across the charging FET and a second voltage across the discharging FET while a first high level voltage is applied to a gate of the charging FET and a second high level voltage is applied to a gate of the discharging FET. The control unit determines a failure in the current detecting circuit based on at least one of the first voltage and the second voltage and the reference current.

Patent Claims
14 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A battery management system, comprising: a current detecting circuit having a shunt resistor installed on a high current path of a battery pack, and configured to detect a reference current representing a current flowing through the high current path; a bidirectional switch including a charging field effect transistor (FET) and a discharging FET connected in series, and installed on the high current path, each of the charging FET and the discharging FET including a respective gate to which a respective high-level voltage is applied; and a control unit operably coupled to the current detecting circuit and the bidirectional switch, wherein the control unit is configured to: select a lookup table based on a high-level voltage applied to the gate of the charging FET or the discharging FET; derive a lookup voltage or a lookup current associated with the detected reference current in the lookup table; and determine a failure in the current detecting circuit based on at least one of the lookup voltage or the lookup current.

2

2. The battery management system according to claim 1 , wherein the control unit is configured to, when the respective high level voltages applied to the charging and discharging FETs are the same: detect a voltage across one of the charging FET or the discharging FET while the high level voltage is applied to its gate; acquire an on-state resistance associated with a drain current corresponding to the reference current as a reference resistance from the lookup table associated with the high level voltage by using the reference current as an index, wherein the lookup table has data indicating a relationship between drain current and on-state resistance of the charging FET and the discharging FET, calculate the lookup current by dividing the detected voltage by the reference resistance, and determine the failure in the current detecting circuit based on a difference between the reference current and the lookup current.

3

3. The battery management system according to claim 1 , wherein the control unit is configured to, when the respective high level voltages applied to the charging and discharging FETs are different: detect a first voltage across the charging FET while a first high level voltage is applied to its gate and a second voltage across the discharging FET while a second high level voltage is applied to its gate; acquire an on-state resistance associated with a drain current corresponding to the reference current as a first reference resistance from a first lookup table associated with the first high level voltage by using the reference current as an index, wherein the first lookup table has data indicating a relationship between drain current and on-state resistance of the charging FET and the discharging FET when the first high level voltage is applied as a gate voltage, acquire an on-state resistance associated with a drain current corresponding to the reference current as a second reference resistance from a second lookup table associated with the second high level voltage by using the reference current as an index, wherein the second lookup table has data indicating a relationship between drain current and on-state resistance of the charging FET and the discharging FET when the second high level voltage is applied as a gate voltage, calculate a first lookup current by dividing the first voltage by the first reference resistance, calculate a second lookup current by dividing the second voltage by the second reference resistance, and determine the failure in the current detecting circuit based on a difference between the first lookup current and the second lookup current.

4

4. The battery management system according to claim 1 , wherein the control unit is configured to, when the respective high level voltages applied to the charging and discharging FETs are the same: detect a voltage across one of the charging FET or the discharging FET while the high level voltage is applied to its gate; acquire a drain-source voltage associated with a drain current corresponding to the reference current as a reference voltage from the lookup table associated with the high level voltage by using the reference current as an index, wherein the lookup table has data indicating a relationship between drain current and drain-source voltage of the charging FET and the discharging FET, and determine the failure in the current detecting circuit based on a difference between the detected voltage and the reference voltage.

5

5. The battery management system according to claim 1 , wherein the control unit is configured to, when the respective high level voltages applied to the charging and discharging FETs are different: detect a first voltage across the charging FET while a first high level voltage is applied to its gate and a second voltage across the discharging FET while a second high level voltage is applied to its gate; acquire a drain-source voltage associated with a drain current corresponding to the reference current as a first reference voltage from a third lookup table associated with the first high level voltage by using the reference current as an index, wherein the third lookup table has data indicating a relationship between drain current and drain-source voltage of the charging FET and the discharging FET when the first high level voltage is applied as a gate voltage, acquire a drain-source voltage associated with a drain current corresponding to the reference current as a second reference voltage from a fourth lookup table associated with the second high level voltage by using the reference current as an index, wherein the fourth lookup table has data indicating a relationship between drain current and drain-source voltage of the charging FET and the discharging FET when the second high level voltage is applied as a gate voltage, and determine the failure in the current detecting circuit based on a difference between a sum of the first detected voltage and the second detected voltage and a sum of the first reference voltage and the second reference voltage.

6

6. The battery management system according to claim 1 , wherein the control unit is configured to: detect a first voltage across the charging FET while a first high level voltage is applied to its gate and a second voltage across the discharging FET while a second high level voltage is applied to its gate; determine the failure in the current detecting circuit based on the second detected voltage and the reference current when the reference current is outside of a preset current range and the first high level voltage is larger than the second high level voltage, and determine the failure in the current detecting circuit based on the first detected voltage and the reference current when the reference current is outside of the preset current range and the first high level voltage is smaller than the second high level voltage.

7

7. The battery management system according to claim 1 , wherein the control unit is configured to: detect a first voltage across the charging FET while a first high level voltage is applied to its gate and a second voltage across the discharging FET while a second high level voltage is applied to its gate; and determine that at least one of the first detected voltage and the second detected voltage is invalid when the first high level voltage is larger than the second high level voltage and the first detected voltage is larger than the second detected voltage.

8

8. The battery management system according to claim 1 , wherein the control unit is configured to: detect a first voltage across the charging FET while a first high level voltage is applied to its gate and a second voltage across the discharging FET while a second high level voltage is applied to its gate; and determine that at least one of the first detected voltage and the second detected voltage is invalid when the first high level voltage is smaller than the second high level voltage and the first detected voltage is smaller than the second detected voltage.

9

9. The battery management system according to claim 1 , wherein the control unit is configured to: detect a first voltage across the charging FET while a first high level voltage is applied to its gate and a second voltage across the discharging FET while a second high level voltage is applied to its gate; and determine that at least one of the first detected voltage and the second detected voltage is invalid when the first high level voltage is equal to the second high level voltage and a difference between the first detected voltage and the second detected voltage is outside of a preset voltage range.

10

10. The battery management system according to claim 1 , wherein the control unit is configured to output a diagnosis signal indicating a result of the determination.

11

11. A battery pack comprising the battery management system according to claim 1 .

12

12. A method for determining a failure in a current detecting circuit, comprising: applying a high level voltage between a gate and a source of one of a charging field effect transistor (FET) for a discharging FET, the charging FET and the discharging FET being connected in series to a high current path of a battery pack; selecting, by a control unit, a lookup table based on a high-level voltage applied to the gate of the charging FET or the discharging FET; deriving, by the control unit, a lookup voltage or a lookup current associated with the detected reference current in the lookup table; determining, by the control unit, the failure in the current detecting circuit based on at least one of the lookup voltage or the lookup current.

13

13. The method for determining a failure in a current detecting circuit according to claim 12 , wherein determining the failure in the current detecting circuit based on at least one of the first voltage and the second voltage and the reference current, comprises, when respective high level voltages applied to the charging and discharging FETs are different: detecting a first voltage across the charging FET while a first high level voltage is applied to its gate and a second voltage across the discharging FET while a second high level voltage is applied to its gate; acquiring an on-state resistance associated with a drain current corresponding to the reference current from a first lookup table associated with the first high level voltage as a first reference resistance by using the reference current as an index; acquiring an on-state resistance associated with a drain current corresponding to the reference current from a second lookup table associated with the second high level voltage as a second reference resistance by using the reference current as an index; calculating a first lookup current by dividing the first voltage by the first reference resistance; calculating a second lookup current by dividing the second voltage by the second reference resistance; and determining the failure in the current detecting circuit based on a difference between the first lookup current and the second lookup current, wherein the first lookup table has data indicating a relationship between drain current and on-state resistance of the charging FET and the discharging FET when the first high level voltage is applied as a gate-source voltage, and the second lookup table has data indicating a relationship between drain current and on-state resistance of the charging FET and the discharging FET when the second high level voltage is applied as a gate-source voltage.

14

14. The method for determining a failure in a current detecting circuit according to claim 12 , wherein determining the failure in the current detecting circuit based on at least one of the first voltage and the second voltage and the reference current comprises, when the respective high level voltages applied to the charging and discharging FETs are different: detecting a first voltage across the charging FET while a first high level voltage is applied to its gate and a second voltage across the discharging FET while a second high level voltage is applied to its gate; acquiring a drain-source voltage associated with a drain current corresponding to the reference current from a third lookup table associated with the first high level voltage as a first reference voltage by using the reference current as an index; acquiring a drain-source voltage associated with a drain current corresponding to the reference current from a fourth lookup table associated with the second high level voltage as a second reference voltage by using the reference current as an index; and determining the failure in the current detecting circuit based on a difference between a sum of the first detected voltage and the second detected voltage and a sum of the first reference voltage and the second reference voltage, wherein the third lookup table has data indicating a relationship between drain current and drain-source voltage of the charging FET and the discharging FET when the first high level voltage is applied as a gate voltage, and the fourth lookup table has data indicating a relationship between drain current and drain-source voltage of the charging FET and the discharging FET when the second high level voltage is applied as a gate voltage.

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Patent Metadata

Filing Date

June 28, 2019

Publication Date

April 26, 2022

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