Patentable/Patents/US-11355658
US-11355658

Imaging apparatus, method of manufacturing the same, and camera

PublishedJune 7, 2022
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

A method of manufacturing an imaging apparatus includes: preparing a substrate comprising a wafer and a silicon layer arranged on the wafer, the wafer including a first semiconductor region made of single crystal silicon with an oxygen concentration not less than 2×1016 atoms/cm3 and not greater than 4×1017 atoms/cm3, the silicon layer including a second semiconductor region made of single crystal silicon with an oxygen concentration lower than the oxygen concentration in the first semiconductor region; annealing the substrate in an atmosphere containing oxygen and setting the oxygen concentration in the second semiconductor region within the range not less than 2×1016 atoms/cm3 and not greater than 4×1017 atoms/cm3; and forming a photoelectric conversion element in the second semiconductor region after the annealing.

Patent Claims
11 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A method of manufacturing an imaging apparatus, comprising: preparing a substrate comprising a wafer and a silicon layer arranged on the wafer, the wafer including a first semiconductor region made of single crystal silicon with an oxygen concentration of 2×10 16 atoms/cm 3 to 4×10 17 atoms/cm 3 , and the silicon layer including a second semiconductor region made of single crystal silicon with an oxygen concentration lower than the oxygen concentration in the first semiconductor region; forming a trench in the silicon layer of the substrate; performing a first annealing for the substrate in an atmosphere containing oxygen such that an inner surface of the trench is oxidized and the oxygen concentration in the second semiconductor region is set within a range of 2×10 16 atoms/cm 3 to 4×10 17 atoms/cm 3 ; forming an impurity region of a conductivity type opposite to a conductivity type of the second semiconductor region along the inner surface of the trench; performing, after the forming of the impurity region, a second annealing for the substrate in an atmosphere not containing oxygen such that an oxygen concentration of a surface of the substrate is reduced and the oxygen concentration in the second semiconductor region is maintained within the range of 2×10 16 atoms/cm 3 to 4×10 17 atoms/cm 3 ; and forming, after the second annealing, a charge accumulation region of a photoelectric conversion element in the second semiconductor region.

2

2. The method according to claim 1 , wherein the forming of the impurity region is performed after the first annealing and before the second annealing.

3

3. The method according to claim 1 , further comprising filling the trench with an insulator after the first annealing and before the second annealing.

4

4. The method according to claim 3 , wherein the insulator includes a portion in which a hydrogen concentration is not less than 5×10 18 atoms/cm 3 .

5

5. The method according to claim 3 , wherein the insulator includes a portion in which a hydrogen concentration is distributed within a range of 2×10 19 atoms/cm 3 to 1×10 21 atoms/cm 3 .

6

6. The method according to claim 1 , wherein the first annealing is executed at a temperature of 800° C. to 1,150° C.

7

7. The method according to claim 1 , wherein in the first annealing, the substrate is cooled at a temperature drop rate of not less than 1° C./sec after the substrate is heated.

8

8. The method according to claim 1 , wherein the silicon layer comprises an epitaxial layer having a thickness of 5 μm to 25 μm.

9

9. The method according to claim 1 , further comprising forming a gate electrode on a surface of the substrate, wherein C 22 max/C 22 min≤10, where C 22 max is a maximum value of the oxygen concentration in the second semiconductor region after the gate electrode is formed and C 22 min is a minimum value of the oxygen concentration in the second semiconductor region after the gate electrode is formed.

10

10. The method according to claim 1 , wherein the second semiconductor region has the same conductivity type as the first semiconductor region, wherein in the forming of the photoelectric conversion element, a first impurity region of a conductivity type different from the conductivity type of the second semiconductor region is formed between the first semiconductor region and the surface of the substrate, and a second impurity region of the same conductivity type as the conductivity type of the second semiconductor region is formed between the first impurity region and the surface of the substrate.

11

11. The method according to claim 1 , further comprising, after the first annealing and before the second annealing, forming an impurity region of a conductivity type opposite to the conductivity type of the second semiconductor region within the second semiconductor region as a part of the photoelectric conversion element.

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Patent Metadata

Filing Date

May 11, 2020

Publication Date

June 7, 2022

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