To provide a hysteresis comparator having a small circuit area and low power consumption. The hysteresis comparator includes a comparator, a switch, a first capacitor, a second capacitor, and a logic circuit. A first terminal of the switch is electrically connected to one of a pair of conductive regions of the first capacitor, one of a pair of conductive regions of the second capacitor, and a first input terminal of the comparator. An output terminal of the comparator is electrically connected to an input terminal of the logic circuit. An output terminal of the logic circuit is electrically connected to the other of the pair of conductive regions of the second capacitor. The logic circuit has a function of generating an inverted signal of a signal input to the input terminal of the logic circuit and outputting the inverted signal to the output terminal of the logic circuit. A reference potential is input to the first input terminal of the comparator and the reference potential is held by the switch. Due to change in the potential of the output terminal of the comparator, the reference potential is changed by capacitive coupling of the second capacitor.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A hysteresis comparator comprising a comparator, a switch, a first capacitor, a second capacitor, and a logic circuit, wherein a first terminal of the switch is electrically connected to one of a pair of conductive regions of the first capacitor, one of a pair of conductive regions of the second capacitor, and a first input terminal of the comparator, wherein an output terminal of the comparator is electrically connected to an input terminal of the logic circuit, wherein an output terminal of the logic circuit is electrically connected to the other of the pair of conductive regions of the second capacitor, and wherein the logic circuit is configured to generate an inverted signal of a signal input to the input terminal of the logic circuit and output the inverted signal to the output terminal of the logic circuit.
2. The hysteresis comparator according to claim 1 , wherein the logic circuit comprises an inverter circuit, wherein the input terminal of the logic circuit is electrically connected to an input terminal of the inverter circuit, and wherein the output terminal of the logic circuit is electrically connected to an output terminal of the inverter circuit.
3. The hysteresis comparator according to claim 1 , wherein the logic circuit comprises a NAND circuit, wherein the input terminal of the logic circuit is electrically connected to a first input terminal of the NAND circuit, and wherein the output terminal of the logic circuit is electrically connected to an output terminal of the NAND circuit.
4. The hysteresis comparator according to claim 1 , wherein the logic circuit comprises a NOR circuit, wherein the input terminal of the logic circuit is electrically connected to a first input terminal of the NOR circuit, and wherein the output terminal of the logic circuit is electrically connected to an output terminal of the NOR circuit.
5. The hysteresis comparator according to claim 1 , wherein the switch comprises a transistor, and wherein the transistor comprises a metal oxide in a channel formation region.
6. A semiconductor device comprising the hysteresis comparator according to claim 1 and a circuit, wherein the circuit is configured to switch an on state and an off state of the switch, generate a reference potential to be input to a second terminal of the switch, and generate an input voltage to be input to a second input terminal of the comparator.
7. A power storage device comprising the semiconductor device according to claim 6 and a cell, wherein when a potential of the positive electrode terminal of the cell and a potential of the negative terminal of the cell are input to the circuit, the circuit is configured to generate the reference potential and the input voltage in accordance with the potential of the positive electrode terminal and the potential of the negative electrode terminal.
8. The hysteresis comparator according to claim 2 , wherein the switch comprises a transistor, and wherein the transistor comprises a metal oxide in a channel formation region.
9. The hysteresis comparator according to claim 3 , wherein the switch comprises a transistor, and wherein the transistor comprises a metal oxide in a channel formation region.
10. The hysteresis comparator according to claim 4 , wherein the switch comprises a transistor, and wherein the transistor comprises a metal oxide in a channel formation region.
11. A semiconductor device comprising the hysteresis comparator according to claim 2 and a circuit, wherein the circuit is configured to switch an on state and an off state of the switch, generate a reference potential to be input to a second terminal of the switch, and generate an input voltage to be input to a second input terminal of the comparator.
12. A semiconductor device comprising the hysteresis comparator according to claim 3 and a circuit, wherein the circuit is configured to switch an on state and an off state of the switch, generate a reference potential to be input to a second terminal of the switch, and generate an input voltage to be input to a second input terminal of the comparator.
13. A semiconductor device comprising the hysteresis comparator according to claim 4 and a circuit, wherein the circuit is configured to switch an on state and an off state of the switch, generate a reference potential to be input to a second terminal of the switch, and generate an input voltage to be input to a second input terminal of the comparator.
14. A semiconductor device comprising the hysteresis comparator according to claim 5 and a circuit, wherein the circuit is configured to switch an on state and an off state of the switch, generate a reference potential to be input to a second terminal of the switch, and generate an input voltage to be input to a second input terminal of the comparator.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
December 11, 2019
June 14, 2022
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