Disclosed herein is a bridge rectifier and associated control circuitry collectively forming a “regtifier”, capable of both rectifying an input time varying voltage as well as regulating the rectified output voltage produced. To accomplish this, the gate voltages of transistors of the bridge rectifier that are on during a given phase may be modulated via analog control (to increase the on-resistance of those transistors) or via pulse width modulation (to turn off those transistors prior to the end of the phase). Alternatively or additionally, the transistors of the bridge rectifier that would otherwise be off during a given phase may be turned on to help dissipate excess power and thereby regulate the output voltage. A traditional voltage regulator, such as a low-dropout amplifier, is not used in this design.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A wireless power reception system, comprising: a bridge rectifier arrangement of transistors receiving an input time varying power signal and being coupled between ground and an output node; a feedback device receiving input from the output node and generating a feedback signal therefrom; and a control circuit coupled to receive the input time varying power signal and the feedback signal, and generating gate voltages for the transistors of the bridge rectifier arrangement based upon the input time varying power signal and the feedback signal to cause: turn on of two transistors of the bridge rectifier arrangement during a first phase, and turn on of two other transistors of the bridge rectifier arrangement during a second phase, to thereby cause rectification of the input time varying power signal to produce an output voltage at the output node; and modulation of a gate voltage of at least one transistor of the bridge rectifier arrangement during the first phase, and modulation of a gate voltage of at least one other transistor of the bridge rectifier arrangement during the second phase, to thereby cause dissipation of excess power delivered by the input time varying power signal and therefore perform output voltage regulation on top of rectification.
2. The wireless power reception system of claim 1 , wherein the at least one transistor that has its gate voltage modulated during the first phase is one of the two transistors that is turned on during the first phase; wherein the at least one other transistor that has its gate voltage modulated during the second phase is one of the two transistors that is turned on during the second phase; and wherein the modulation of the gate voltage of the at least one transistor during the first phase and the modulation of the gate voltage of the at least one other transistor during the second phase serves to modulate a drain to source resistance of the at least one transistor and the at least one other transistor so that the excess power delivered by the input time varying power signal is dissipated.
3. The wireless power reception system of claim 2 , wherein the at least one transistor that has its gate voltage modulated during the first phase is a high side transistor; and wherein the at least one other transistor that has its gate voltage modulated during the second phase is a high side transistor.
4. The wireless power reception system of claim 2 , wherein the at least one transistor that has its gate voltage modulated during the first phase is a low side transistor; and wherein the at least one other transistor that has its gate voltage modulated during the second phase is a low side transistor.
5. The wireless power reception system of claim 1 , wherein the at least one transistor that has its gate modulated during the first phase is not one of the two transistors that is turned on during the first phase; wherein the at least one other transistor that has its gate modulated during the second phase is not one of the two transistors that is turned on during the second phase; and wherein the modulation of the gate voltage of the at least one transistor during the first phase and the modulation of the gate voltage of the at least one other transistor during the second phase serves to sufficiently turn on the at least one transistor and the at least one other transistor so that the excess power delivered by the input time varying power signal is dissipated.
6. The wireless power reception system of claim 5 , wherein the at least one transistor that has its gate voltage modulated during the first phase is a high side transistor; and wherein the at least one other transistor that has its gate voltage modulated during the second phase is a high side transistor.
7. The wireless power reception system of claim 5 , wherein the at least one transistor that has its gate voltage modulated during the first phase is a low side transistor; and wherein the at least one other transistor that has its gate voltage modulated during the second phase is a low side transistor.
8. The wireless power reception system of claim 1 , wherein the feedback device comprises an amplifier having a non-inverting input terminal coupled to the output node, an inverting input terminal coupled to a reference voltage, and an output at which the feedback signal is generated.
9. The wireless power reception system of claim 8 , wherein the reference voltage is a desired output voltage; wherein the amplifier amplifies the feedback signal if the output voltage at the output node exceeds the reference voltage, and the control circuit adjusts the modulation of the gate voltage of at least one transistor of the bridge rectifier arrangement during the first phase, and modulation of a gate voltage of at least one other transistor of the bridge rectifier arrangement during the second phase to cause sufficient dissipation of excess power delivered by the input time varying signal such that the output voltage at the output node remains close to the reference voltage.
10. The wireless power reception system of claim 1 , wherein the bridge rectifier arrangement of transistors is comprised of series coupled second and third transistors connected between the output node and ground, and series coupled first and fourth transistors connected between the output node and ground; wherein the two transistors that are turned on during the first phase are the first and second transistor, and the two transistors that are turned on during the second phase are the third and fourth transistors; wherein the at least one transistor that has its gate voltage modulated during the first phase is the first transistor; and wherein the at least one transistor that has its gate voltage modulated during the second phase is the third transistor.
11. The wireless power reception system of claim 1 , wherein the bridge rectifier arrangement of transistors is comprised of series coupled second and third transistors connected between the output node and ground, and series coupled first and fourth transistors connected between the output node and ground; wherein the two transistors that are turned on during the first phase are the first and second transistor, and the two transistors that are turned on during the second phase are the third and fourth transistors; wherein the at least one transistor that has its gate voltage modulated during the first phase is the second transistor; and wherein the at least one transistor that has its gate voltage modulated during the second phase is the fourth transistor.
12. The wireless power reception system of claim 1 , wherein the bridge rectifier arrangement of transistors is comprised of series coupled second and third transistors connected between the output node and ground, and series coupled first and fourth transistors connected between the output node and ground; wherein the two transistors that are turned on during the first phase are the first and second transistor, and the two transistors that are turned on during the second phase are the third and fourth transistors; wherein the at least one transistor that has its gate voltage modulated during the first phase is the first transistor and the second transistor; and wherein the at least one transistor that has its gate voltage modulated during the second phase is the third transistor and the fourth transistor.
13. The wireless power reception system of claim 1 , wherein the bridge rectifier arrangement of transistors is comprised of series coupled second and third transistors connected between the output node and ground, and series coupled first and fourth transistors connected between the output node and ground; wherein the two transistors that are turned on during the first phase are the first and second transistor, and the two transistors that are turned on during the second phase are the third and fourth transistors; wherein the at least one transistor that has its gate voltage modulated during the first phase is the third transistor; and wherein the at least one transistor that has its gate voltage modulated during the second phase is the first transistor.
14. The wireless power reception system of claim 1 , wherein the bridge rectifier arrangement of transistors is comprised of series coupled second and third transistors connected between the output node and ground, and series coupled first and fourth transistors connected between the output node and ground; wherein the two transistors that are turned on during the first phase are the first and second transistor, and the two transistors that are turned on during the second phase are the third and fourth transistors; wherein the at least one transistor that has its gate voltage modulated during the first phase is the fourth transistor; and wherein the at least one transistor that has its gate voltage modulated during the second phase is the second transistor.
15. The wireless power reception system of claim 1 , wherein the bridge rectifier arrangement of transistors is comprised of series coupled second and third transistors connected between the output node and ground, and series coupled first and fourth transistors connected between the output node and ground; wherein the two transistors that are turned on during the first phase are the first and second transistor, and the two transistors that are turned on during the second phase are the third and fourth transistors; wherein the at least one transistor that has its gate voltage modulated during the first phase is the third and fourth transistor; and wherein the at least one transistor that has its gate voltage modulated during the second phase is the first and second transistor.
16. The wireless power reception system of claim 1 , wherein the control circuit comprises: a control signal generator configured to: during the first phase, generate a first control signal that has a voltage magnitude sufficient to fully turn on the two transistors of the bridge rectifier arrangement, and generate a second control signal that has a voltage magnitude low enough to fully turn off the two other transistors of the bridge rectifier arrangement; and during the second phase, generate the second control signal as having a voltage magnitude sufficient to fully turn on the two other transistors of the bridge rectifier arrangement, and generating the first control signal as having a voltage magnitude low enough to fully turn off the two transistors of the bridge rectifier arrangement; a first switch circuit configured to: during the first phase, generate the gate voltage for the at least one transistor by generating the gate voltage as being equal to a voltage of the first control signal less a voltage of the feedback signal; and during the second phase, generate the gate voltage for the at least one transistor by generating the gate voltage as being equal to the voltage of the first control signal; and a second switch circuit configured to: during the first phase, generate the gate voltage for the at least one other transistor by generating the gate voltage as being equal to a voltage of the second control signal; and during the second phase, generate the gate voltage for the at least one other transistor by generating the gate voltage as being equal to a voltage of the second control signal less a voltage of the feedback signal.
17. The wireless power reception system of claim 1 , wherein the control circuit comprises: a control signal generator configured to: during the first phase, generate a first control signal that has a voltage magnitude sufficient to fully turn on the two transistors of the bridge rectifier arrangement, and generate a second control signal that has a voltage magnitude low enough to fully turn off the two other transistors of the bridge rectifier arrangement; and during the second phase, generate the second control signal as having a voltage magnitude sufficient to fully turn on the two other transistors of the bridge rectifier arrangement, and generating the first control signal as having a voltage magnitude low enough to fully turn off the two transistors of the bridge rectifier arrangement; a first switch circuit configured to: during the first phase, generate a gate voltage for the at least one transistor as being equal to the voltage of the first control signal; and during the second phase, generate the gate voltage for the at least one transistor as being equal to a sum of the voltage of the first control signal and a voltage of the feedback signal; and a second switch circuit configured to: during the first phase, generate a gate voltage for the at least one other transistor as being equal to a sum of the voltage of the second control signal and the voltage of the feedback signal; and during the first phase, generate the gate voltage for the at least one other transistor as being equal to the voltage of the second control signal.
18. The wireless power reception system of claim 1 , wherein the at least one transistor that has its gate voltage modulated during the first phase is one of the two transistors that is turned on during the first phase; wherein the at least one other transistor that has its gate voltage modulated during the second phase is one of the two transistors that is turned on during the second phase; and wherein the modulation of the gate voltage of the at least one transistor during the first phase and the modulation of the gate voltage of the at least one other transistor during the second phase is performed via pulse width modulation.
19. The wireless power reception system of claim 18 , wherein the at least one transistor that has its gate voltage modulated during the first phase is a high side transistor; and wherein the at least one transistor that has its gate voltage modulated during the second phase is a high side transistor.
20. The wireless power reception system of claim 18 , wherein the at least one transistor that has its gate voltage modulated during the first phase is a low side transistor; and wherein the at least one transistor that has its gate voltage modulated during the second phase is a low side transistor.
21. The wireless power reception system of claim 18 , wherein the feedback device is a comparator having a non-inverting input terminal coupled to the output node, an inverting input terminal coupled to a reference voltage that is equal to a desired output voltage, and an output generating the feedback signal in digital form; wherein the comparator asserts the feedback signal when the output voltage exceeds the reference voltage; and wherein the control circuit modulates the gate voltage of the at least one transistor during the first phase by pulling the gate voltage of the at least one transistor low when the feedback signal is asserted, and modulates the gate voltage of the at least one other transistor during the second phase by pulling the gate voltage of the at least one other transistor low when the feedback signal is asserted.
22. The wireless power reception system of claim 1 , wherein the control circuit turns on the two transistors of the bridge rectifier arrangement during the first phase by generating their respective gate voltages as having a first constant magnitude; wherein the at least one transistor that has its gate voltage modulated during the first phase is one of the two transistors that is turned on during the first phase; wherein the control circuit modulates the gate voltage of the at least one transistor during the first phase by reducing its gate voltage so that its magnitude drops from the first constant magnitude to a second constant magnitude less than the first constant magnitude; wherein the control circuit turns on the two other transistors of the bridge rectifier arrangement during the second phase by generating their respective gate voltages as having the first constant magnitude; wherein the at least one transistor that has its gate voltage modulated during the second phase is one of the two transistors that is turned on during the second phase; and wherein the control circuit modulates the gate voltage of the at least one transistor during the second phase by reducing its gate voltage so that its magnitude drops from the first constant magnitude to the second constant magnitude.
23. The wireless power reception of claim 22 , wherein the at least one transistor that has its gate voltage modulated during the first phase is a high side transistor; and wherein the at least one transistor that has its gate voltage modulated during the second phase is a high side transistor.
24. The wireless power reception of claim 22 , wherein the at least one transistor that has its gate voltage modulated during the first phase is a low side transistor; and wherein the at least one transistor that has its gate voltage modulated during the second phase is a low side transistor.
25. The wireless power reception system of claim 1 , wherein the bridge rectifier arrangement of transistors comprises first and fourth transistors coupled in series between the output node and ground, and third and second transistors coupled in series between the output node and ground; wherein the feedback device is a comparator having a non-inverting input terminal coupled to the output node, an inverting input terminal coupled to a reference voltage that is equal to a desired output voltage, and an output generating the feedback signal in digital form; wherein the comparator asserts the feedback signal when the output voltage exceeds the reference voltage; wherein the control circuit turns on the first and second transistors of the bridge rectifier during the first phase by generating their respective gate voltages as having a first constant magnitude, and turns on the third and fourth transistors of the bridge rectifier during the second phase by generating their respective gate voltages as having the first constant magnitude; wherein the control circuit modulates the gate voltage of at least one of the first and second transistors during the first phase in response to assertion of the feedback signal by reducing that gate voltage so that its magnitude drops from the first constant magnitude to a second constant magnitude less than the first constant magnitude; wherein the control circuit modulates the gate voltage of at least one of the third and fourth transistors during the second phase in response to assertion of the feedback signal; and wherein the control circuit modulates the gate voltage of at least one of the third and fourth transistors during the second phase in response to assertion of the feedback signal by reducing that gate voltage so that its magnitude drops from the first constant magnitude to the second constant magnitude.
26. The wireless power reception system of claim 25 , wherein the control circuit modulates the gate voltage of only the first transistor during the first phase in response to assertion of the feedback signal; and wherein the control circuit modulates the gate voltage of only the third transistor during the second phase in response to assertion of the feedback signal.
27. The wireless power reception system of claim 25 , wherein the control circuit modulates the gate voltage of only the second transistor during the first phase in response to assertion of the feedback signal; and wherein the control circuit modulates the gate voltage of only the fourth transistor during the second phase in response to assertion of the feedback signal.
28. A wireless power reception system, comprising: a bridge rectifier arrangement of transistors receiving an input time varying power signal and being coupled between ground and an output node; wherein the bridge rectifier arrangement of transistors comprises: a first transistor and a first companion transistor coupled in parallel between the output node and a first node, wherein a gate of the first transistor is coupled to receive a first gate voltage and a gate of the first companion transistor is coupled to receive a first companion gate voltage; a fourth transistor and a fourth companion transistor coupled in parallel between the first node and ground, wherein a gate of the fourth transistor is coupled to receive a fourth gate voltage and a gate of the fourth companion transistor is coupled to receive a fourth companion gate voltage; a third transistor and a third companion transistor coupled in parallel between the output node and a second node, wherein a gate of the third transistor is coupled to receive a third gate voltage and a gate of the third companion transistor is coupled to receive a third companion gate voltage; a second transistor and a second companion transistor coupled in parallel between the second node and ground, wherein a gate of the second transistor is coupled to receive a second gate voltage and a gate of the second companion transistor is coupled to receive a second companion gate voltage; a feedback device receiving input from the output node and generating a feedback signal therefrom; and a control circuit coupled to receive the input time varying power signal and the feedback signal, and generating gate voltages for the transistors of the bridge rectifier arrangement to cause: turn on of the first transistor, first companion transistor, second transistor, and second companion transistor during a first phase, and turn on of the third transistor, third companion transistor, fourth transistor, and fourth companion transistor during a second phase, to thereby cause rectification of the input time varying power signal to produce an output voltage at the output node; and turn off of at least one of the first transistor and the second transistor prior to an end of the first phase, and turn off of at least one of the third transistor and the fourth transistor prior to an end of the second phase, to thereby cause dissipation of excess power delivered by the input time varying power signal.
29. The wireless power reception system of claim 28 , wherein the first transistor and first companion transistor have a same length but a different width to length ratio; wherein the second transistor and second companion transistor have a same length but different width to length ratio; wherein the third transistor and third companion transistor have a same length but different width to length ratio; and wherein the fourth transistor and fourth companion transistor have a same length but different width to length ratio.
30. The wireless power reception system of claim 29 , wherein the first transistor is greater in width to length ratio than the first companion transistor; wherein the second transistor is greater in width to length ratio than the second companion transistor; wherein the third transistor is greater in width to length ratio than the third companion transistor; and wherein the fourth transistor is greater in width to length ratio than the fourth companion transistor.
31. The wireless power reception system of claim 28 , wherein the control circuit generates the gate voltages for the transistors of the bridge arrangement so as to cause turn off of the first transistor and the second transistor prior to an end of the first phase, and turn off of the third transistor and the fourth transistor prior to an end of the second phase.
32. The wireless power reception system of claim 28 , wherein the control circuit generates the gate voltages for the transistors of the bridge arrangement so as to cause turn off of the first transistor prior to an end of the first phase, and turn off of the third transistor prior to an end of the second phase.
33. The wireless power reception system of claim 28 , wherein the control circuit generates the gate voltages for the transistors of the bridge arrangement so as to cause turn off of the second transistor prior to an end of the first phase, and turn off of the fourth transistor prior to an end of the second phase.
34. The wireless power reception system of claim 28 , wherein the feedback device is a comparator having a non-inverting input terminal coupled to the output node, an inverting input terminal coupled to a reference voltage that is equal to a desired output voltage, and an output generating the feedback signal in digital form; wherein the comparator asserts the feedback signal when the output voltage exceeds the reference voltage; wherein the control circuit turns off at least one of the first transistor and the second transistor prior to the end of the first phase by pulling the respective gate voltage low in response to assertion of the feedback signal; and wherein the control circuit turns off at least one of the third transistor and the fourth transistor prior to the end of the first phase by pulling the respective gate voltage low in response to assertion of the feedback signal.
35. A wireless power reception system, comprising: a bridge rectifier arrangement of transistors receiving an input time varying power signal and being coupled between ground and an output node; a feedback device receiving input from the output node and generating a feedback signal therefrom; and a control circuit coupled to receive the input time varying power signal and the feedback signal, and generating gate voltages for the transistors of the bridge rectifier arrangement based upon the input time varying power signal and the feedback signal to cause: turn on of two transistors of the bridge rectifier arrangement during a first phase, and turn on of two other transistors of the bridge rectifier arrangement during a second phase, to thereby cause rectification of the input time varying power signal to produce an output voltage at the output node; and modulation of a gate voltage of at least one transistor of the bridge rectifier arrangement during the first phase, and modulation of a gate voltage of at least one other transistor of the bridge rectifier arrangement during the second phase, to thereby cause dissipation of excess power delivered by the input time varying power signal; wherein, based upon operating conditions of the wireless power reception system, the control circuit operates the bridge rectifier arrangement in an in-phase serial configuration and operates the bridge rectifier arrangement in an anti-phase parallel configuration.
36. The wireless power reception system of claim 35 , wherein one of the two transistors turned on during the first phase is a high side transistor and the other of the two transistors turned on during the first phase is a low side transistor; wherein one of the two transistors turned on during the second phase is a low side transistor and the other of the two transistors turned on during the second phase is a high side transistor; and the control circuit operates the bridge rectifier arrangement in the in-phase serial configuration by modulating the gate voltage of the high side transistors, and operates the bridge rectifier arrangement in the anti-phase parallel configuration by modulating the gate voltage of the low side transistor not turned on during the first phase, during the first phase, and by modulating the gate voltage of the low side transistor not turned on during the second phase, during the second phase.
37. The wireless power reception system of claim 36 , wherein the modulation of the gate voltages in the in-phase serial configuration is performed via pulse width modulation.
38. The wireless power reception system of claim 35 , wherein one of the two transistors turned on during the first phase is a high side transistor and the other of the two transistors turned on during the first phase is a low side transistor; wherein one of the two transistors turned on during the second phase is a low side transistor and the other of the two transistors turned on during the second phase is a high side transistor; and the control circuit operates the bridge rectifier arrangement in the in-phase serial configuration by modulating the gate voltage of the low side transistors, and operates the bridge rectifier arrangement in the anti-phase parallel configuration by modulating the gate voltage of the high side transistor not turned on during the first phase, during the first phase, and by modulating the gate voltage of the high side transistor not turned on during the second phase, during the second phase.
39. The wireless power reception system of claim 38 , wherein the modulation of the gate voltages in the in-phase serial configuration is performed via pulse width modulation.
40. The wireless power reception system of claim 35 , wherein, based upon operating conditions of the wireless power reception, the control circuit switches between generating the gate voltages so as to operate the bridge rectifier arrangement in an in-phase serial configuration, and to operate the bridge rectifier arrangement in an anti-phase parallel configuration.
41. The wireless power reception system of claim 35 , wherein the operating conditions are an amount of excess power to be dissipated.
42. The wireless power reception system of claim 41 , wherein the control circuit switches to generating the gate voltage so as to operate the bridge rectifier arrangement in the in-phase serial configuration when the excess power to be dissipated is below a threshold, but switches to generating the gate voltage so as to operate the bridge rectifier arrangement in the anti-phase parallel configuration when the excess power to be dissipated is above the threshold.
43. The wireless power reception system of claim 35 , wherein the control circuit switches between operating the bridge rectifier in the in-phase serial configuration and in the anti-phase parallel configuration dependent upon whether a current phase is the first phase or the second phase.
44. The wireless power reception system of claim 35 , wherein the control circuit switches between operating the bridge rectifier in the in-phase serial configuration and in the anti-phase parallel configuration dependent upon the passage of a given number of phases.
45. The wireless power reception system of claim 35 , wherein, when in the in-phase serial configuration: the at least one transistor that has its gate voltage modulated during the first phase is one of the two transistors that is turned on during the first phase; the at least one other transistor that has its gate voltage modulated during the second phase is one of the two transistors that is turned on during the second phase; and the modulation of the gate voltage of the at least one transistor during the first phase and the modulation of the gate voltage of the at least one other transistor during the second phase serves to modulate a drain to source resistance of the at least one transistor and the at least one other transistor so that the excess power delivered by the input time varying power signal is dissipated.
46. The wireless power reception system of claim 35 , wherein, when in the in-phase serial configuration: the at least one transistor that has its gate voltage modulated during the first phase is one of the two transistors that is turned on during the first phase; the at least one other transistor that has its gate voltage modulated during the second phase is one of the two transistors that is turned on during the second phase; and the modulation of the gate voltage of the at least one transistor during the first phase and the modulation of the gate voltage of the at least one other transistor during the second phase is performed via pulse width modulation.
47. The wireless power reception system of claim 35 , wherein, when in the anti-phase parallel configuration: the at least one transistor that has its gate modulated during the first phase is not one of the two transistors that is turned on during the first phase; the at least one other transistor that has its gate modulated during the second phase is not one of the two transistors that is turned on during the second phase; and the modulation of the gate voltage of the at least one transistor during the first phase and the modulation of the gate voltage of the at least one other transistor during the second phase serves to sufficiently turn on the at least one transistor and the at least one other transistor so that the excess power delivered by the input time varying power signal is dissipated.
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July 16, 2020
June 21, 2022
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