Patentable/Patents/US-11380710
US-11380710

Semiconductor device and method for manufacturing semiconductor device

PublishedJuly 5, 2022
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

To provide a semiconductor device capable of reducing a parasitic capacitance, securing high reliability, and suppressing an increase in manufacturing cost. A semiconductor device is provided which includes a substrate including an embedded insulation film and a semiconductor layer on the embedded insulation film and on which a semiconductor element is formed and a gate electrode on the semiconductor layer, in which the gate electrode includes a band-shaped first electrode portion that extends from a center portion of the semiconductor layer and beyond an end of the semiconductor layer along a first direction in a case where the substrate is viewed from above, and in a cross section in a case where the first electrode portion and the substrate are cut along the first direction, a film thickness of the end of the semiconductor layer is thicker than a film thickness of the center portion of the semiconductor layer.

Patent Claims
8 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A semiconductor device comprising: a substrate including an embedded insulation film and a semiconductor layer that is provided on the embedded insulation film and on which a semiconductor element is formed; a gate electrode provided on the semiconductor layer, wherein the gate electrode includes a band-shaped first electrode portion that extends from a center portion of the semiconductor layer and beyond an end of the semiconductor layer along a first direction in a case where the substrate is viewed from above, wherein in a cross section in a case where the first electrode portion and the substrate are cut along the first direction, a film thickness of the end of the semiconductor layer is thicker than a film thickness of the center portion of the semiconductor layer, wherein a silicon oxide film surrounding the semiconductor layer such that the film thickness of the end of the semiconductor layer is thicker than a film thickness of the silicon oxide film, and wherein a source contact via and a drain contact via are provided on the center portion of the semiconductor layer having a film thickness thinner than the film thickness of the end of the semiconductor layer.

2

2. The semiconductor device according to claim 1 , wherein the gate electrode further includes a second electrode portion that extends from the first electrode portion along a second direction perpendicular to the first direction in a case where the substrate is viewed from above.

3

3. The semiconductor device according to claim 2 , wherein in a case where the second electrode portion and the substrate are cut along the first direction, the film thickness of the end of the semiconductor layer is thicker than the film thickness of the center portion of the semiconductor layer.

4

4. The semiconductor device according to claim 3 , wherein the source contact via and the drain contact via are provided above the center portion of the semiconductor layer so as to sandwich the second electrode portion in a case where the substrate is viewed from above.

5

5. The semiconductor device according to claim 4 , further comprising: silicide films provided between the center portion of the semiconductor layer and the source contact via and between the semiconductor layer and the drain contact via.

6

6. The semiconductor device according to claim 2 , wherein in a case where the second electrode portion and the substrate are cut along the second direction, the film thickness of the end of the semiconductor layer is thicker than the film thickness of the center portion of the semiconductor layer.

7

7. The semiconductor device according to claim 2 , wherein the gate electrode includes a plurality of the second electrode portions.

8

8. The semiconductor device according to claim 1 , wherein the source contact via and the drain contact via are provided above the center portion of the semiconductor layer so as to sandwich the first electrode portion along a second direction perpendicular to the first direction in a case where the substrate is viewed from above.

Classification Codes (CPC)

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Patent Metadata

Filing Date

January 18, 2018

Publication Date

July 5, 2022

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Cite as: Patentable. “Semiconductor device and method for manufacturing semiconductor device” (US-11380710). https://patentable.app/patents/US-11380710

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